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參數(shù)資料
| 型號(hào)： | MAX3675EHJ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類(lèi)： | 數(shù)字傳輸電路 |
| 英文描述： | 622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| 中文描述： | CLOCK RECOVERY CIRCUIT, PQFP32 |
| 封裝： | 5 X 5 MM, 1 MM HEIGHT, MS-026AAA, TQFP-32 |
| 文件頁(yè)數(shù)： | 11/16頁(yè) |
| 文件大?。?/td> | 190K |
| 代理商： | MAX3675EHJ |
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M
622Mbps, Low-Power, 3.3V Cloc k-Rec overy
and Data-Retiming IC with Limiting Amplifier
______________________________________________________________________________________
11
Reduc ed Power Consumption
Without the Limiting Amplifier
The limiting amplifier is biased independently from the
clock recovery circuitry. Grounding INSEL turns off the
limiting amplifier and selects the PECL DDI inputs.
Converting Average Optic al Power
to S ignal Amplitude
Many of the MAX3675’s specifications relate to input-
signal amplitude. When working with fiber optic
receivers, the input is usually expressed in terms of
average optical power and extinction ratio. The rela-
tions given in Table 2 and Figure 6 are helpful for con-
verting optical power to input signal when designing
with the MAX3675.
In an optical receiver, the input voltage to the limiting
amplifier can be found by multiplying the relationship in
Table 2 by the photodiode responsivity and transim-
pedance amplifier gain.
Optical Hysteresis
Power and hysteresis are often expressed in decibels.
By definition, decibels are always 10log (power). At the
inputs to the MAX3675 limiting amplifier, the power is
V
IN
2
/R. If a receiver’s optical input power (x) increases
by a factor of two, and the preamplifier is linear, then the
voltage at the input to the MAX3675 also increases by a
factor of two.
The optical power increase is 10log(2x/x) = 10log(2) =
+3dB.
At the MAX3675, the voltage increase is:
In an optical receiver, the dB change at the MAX3675
always equals 2x the optical dB change.
The MAX3675’s typical voltage hysteresis is 3.0dB. This
provides an optical hysteresis of 1.5dB.
J itter in Optic al Rec eivers
Timing jitter, edge speeds, aberrations, optical disper-
sion, and attenuation all impact the performance of
high-speed clock recovery for SDH/SONET receivers
(Figure 7). These effects decrease the time available
for error-free data recovery by reducing the received
“eye opening” of non-return-to-zero (NRZ) transmitted
signals.
10
10
2
20
2
6
2
2
2
log
log(
)
log( )
2V
(
/ R
V
/ R
IN
IN
)
=
=
= +
dB
TIME
P0
P1
P
AVE
Figure 6. Optical Power Relations
Table 2. Optical-Power Relations*
*Assuming a 50% average input data duty cycle.
SYMBOL
RELATION
Average
Power
P
AVE
Extinction
Ratio
r
e
PARAMETER
Optical Power
of a “1”
P1
Optical Power
of a “0”
P0
Signal
Amplitude
P
IN
P
= P0 + P1
AVE
)
/2
r = 1 / P0
P
P
r
r
AVE
e
+
e
(
1
2
1
=
P
P
r
AVE
e
0
2
1
=
+
)
/
P
P
P
P
r
r
IN
AVE
e
e
=
=
+
(
)
1
0
2
1
1
A
A
EYE DIAGRAM WITH NOTIMING JITTER
EFFECTS OF TIMING JITTER ON EYE DIAGRAM
TIME
MIDPOINT
TIME
MIDPOINT
Figure 7. Eye Diagram With and Without Timing J itter
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3675EHJEVKIT | 功能描述:時(shí)鐘和定時(shí)器開(kāi)發(fā)工具 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類(lèi)型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| MAX3675EHJ-T | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX3676E/D | 功能描述:計(jì)時(shí)器和支持產(chǎn)品 RoHS:否 制造商:Micrel 類(lèi)型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| MAX3676E/D DIE | 制造商:Maxim Integrated Products 功能描述: |
| MAX3676E/D+ | 功能描述:計(jì)時(shí)器和支持產(chǎn)品 RoHS:否 制造商:Micrel 類(lèi)型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
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