- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384665 > MAX3675EHJ (MAXIM INTEGRATED PRODUCTS INC) 622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier PDF資料下載
參數(shù)資料
| 型號： | MAX3675EHJ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| 中文描述： | CLOCK RECOVERY CIRCUIT, PQFP32 |
| 封裝： | 5 X 5 MM, 1 MM HEIGHT, MS-026AAA, TQFP-32 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 190K |
| 代理商： | MAX3675EHJ |
M
622Mbps, Low-Power, 3.3V Cloc k-Rec overy
and Data-Retiming IC with Limiting Amplifier
10
______________________________________________________________________________________
The MAX3675 is optimally designed to acquire lock and
to provide a bit-error rate (BER) of less than 10
-10
for long
strings of consecutive zeros and ones. Using the recom-
mended external component values of R
F
= 52.3
±1%
and C
F
= 2.2μF ±20%, measured results show that the
MAX3675 can tolerate 1000 consecutive ones or zeros. It
is important to select a type of capacitor for C
F
that has a
temperature stability of ±10% or better. This ensures per-
formance over the -40°C to +85°C temperature range.
Loc k Detec t
The MAX3675’s loss-of-lock (LOL) monitor indicates
when the PLL is locked. Under normal operation, the
loop is locked and the
LOL
output signal is high. When
the MAX3675 loses lock, a fast negative-edge transition
occurs on
LOL
. The output level remains at a low
level (held by C
LOL
) until the loop reacquires lock
(Figure 4).
Note that the LOL monitor is only valid when a data
stream is present on the inputs to the MAX3675. As a
result, LOL does not detect a loss-of-power condition
resulting from a loss of the incoming signal. See the
Loss-of-Power (LOP) Monitor section for this type of
indicator.
Input and Output T erminations
The MAX3675 digital data and clock I/Os (DDI+, DDI-,
SDO+, SDO-, SCLK+, and SCLK-) are designed to
interface with PECL signal levels. It is important to bias
these ports appropriately. A circuit that provides a
Thevenin equivalent of 50
to V
CC
- 2V should be used
with fixed-impedance transmission lines for proper ter-
mination. Make sure that the differential outputs have
balanced loads.
The digital data input signals (DDI+ and DDI-) are dif-
ferential inputs to an emitter-coupled pair. As a result,
the MAX3675 can accept differential input signals as
low as 250mV. These inputs can also be driven single-
ended by externally biasing DDI- to the center of the
voltage swing.
The MAX3675’s performance can be greatly affected
by circuit board layout and design. Use good high-fre-
quency design techniques, including minimizing
ground inductance and using fixed-impedance trans-
mission lines on the data and clock signals. Power-sup-
ply decoupling should be placed as close to V
CC
as
possible. Take care to isolate the input from the output
signals to reduce feedthrough.
__________Applic ations Information
Driving the Limiting Amplifier
S ingle-Ended
There are three important requirements for driving the
limiting amplifier from a single-ended source (Figure 5):
1) There must be no DC coupling to the ADI+ and ADI-
inputs. DC levels at these inputs disrupt the
offset-correction loop.
2) The terminating resistor R
T
(50
) must be referenced
to the ADI- input to minimize common-mode coupling
problems.
3) The low-frequency cutoff for the limiting amplifier
is determined by either C
IN
and the 2.5k
input
impedance or C
b
/2 together with R
T
. With C
b
= 0.22μF
and R
T
= 50
,
the low-frequency cutoff is 29kHz.
ACQUIRE
NODATA
LOP
O
LOCKED
TIME
LOL
Figure 4. Loss-of-Lock Output
C
IN
5.6nF
C
b
0.22
μ
F
C
b
0.22
μ
F
R
T
50
2.5k
ADI+
ADI-
MAX3675
Figure 5. Single-Ended Input Termination
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX3675 | 622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| MAX3675ECJ | 622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| MAX3676EHJ | 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| MAX3676 | 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier |
| MAX3736 | 3.2Gbps, Low-Power, Compact, SFP Laser Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX3675EHJEVKIT | 功能描述:時鐘和定時器開發(fā)工具 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| MAX3675EHJ-T | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MAX3676E/D | 功能描述:計時器和支持產(chǎn)品 RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| MAX3676E/D DIE | 制造商:Maxim Integrated Products 功能描述: |
| MAX3676E/D+ | 功能描述:計時器和支持產(chǎn)品 RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。