參數(shù)資料
型號(hào)： MAX194
廠商： Maxim Integrated Products, Inc.
英文描述： 14-Bit, 85ksps ADC with 10礎(chǔ) Shutdown(85ksps,單通道,14位串行A/D轉(zhuǎn)換器)
中文描述： 14位、85ksps ADC，帶有10µ關(guān)斷
文件頁(yè)數(shù)： 22/24頁(yè)
文件大?。?/td> 267K
代理商： MAX194
M
14-Bit, 85ksps ADC with 10μA S hutdown
22
______________________________________________________________________________________
MAX194
10
μ
F
VDDD
VDDA
VSSA
VSSD
AGND
DGND
5V
5V
0.1
μ
F
0.1
μ
F
10
μ
F
10
10
10
μ
F
0.1
μ
F
0.1
μ
F
10
μ
F
100
0.01
1
10
CONVERSIONS PER SECOND
100
1000
10,000 100,000
0.1
M
P
1
10
20
μ
s WAKE-UP DELAY
0.05LSB ERROR
3.2
μ
s WAKE-UP DELAY
0.1LSB ERROR
graph of theoretical power consumption vs. conver-
sions per second for the MAX194 that assumes the
conversion clock is 1.7MHz and the converter is shut
down as much as possible between conversions.
Stop CLK before shutting down the MAX194. CLK must
be stopped without generating short clock pulses. Short
CLK pulses (less than 150ns), or shutting down the
MAX194 without stopping CLK, may adversely affect the
MAX194’s internal calibration data. In applications
where CLK is free-running and asynchronous, use the
circuit of Figure 24 to stop CLK cleanly.
To minimize the time required to settle and perform a
conversion, shut the converter down only after a con-
version is finished and the desired mode (unipolar or
bipolar) has been set. This ensures that the sampling
capacitor array is properly connected to the input sig-
nal. If shut down in mid-conversion, when awakened,
the MAX194 finishes the old conversion, allows four
clock (CLK) cycles for input acquisition, then begins
the new conversion.
_____________Dynamic Performanc e
High-speed sampling capability, 85ksps throughput,
and wide dynamic range make the MAX194 ideal for
AC applications and signal processing. To support
these and other related applications, Fast Fourier
Transform (FFT) test techniques are used to guarantee
the ADC’s dynamic frequency response, distortion, and
noise at the rated throughput. Specifically, this involves
applying a low-distortion sine wave to the ADC input
and recording the digital conversion results for a
specified time. The data is then analyzed using an FFT
algorithm, which determines its spectral content.
Conversion errors are then seen as spectral elements
other than the fundamental input frequency.
S ignal-to-Noise Ratio and
Effec tive Number of Bits
Signal-to-Noise Ratio (SNR) is the ratio between the
RMS amplitude of the fundamental input frequency to
the RMS amplitude of all other ADC output signals. The
output band is limited to frequencies above DC and
below one-half the ADC sample rate. This usually (but
not always) includes distortion as well as noise compo-
nents. For this reason, the ratio is sometimes referred to
as Signal-to-Noise + Distortion (SINAD).
The theoretical minimum ADC noise is caused by quan-
tization error and is a direct result of the ADC’s resolu-
tion: SNR = (6.02N + 1.76)dB, where N is the number
of bits of resolution. A perfect 14-bit ADC can, there-
fore, do no better than 86dB. An FFT plot of the output
shows the output level in various spectral bands. Figure
25 shows the result of sampling a pure 1kHz sinusoid at
85ksps with the MAX194.
By transposing the equation that converts resolution to
SNR, we can, from the measured SNR, determine the
effective resolution or the “effective number of bits” the
ADC provides: N = (SNR - 1.76) / 6.02. Substituting
SINAD for SNR in this formula results in a better mea-
Figure 22. Supply Bypassing and Grounding
Figure 23. Power Dissipation vs. Conversions/sec When
Shutting the MAX194 Down Between Conversions
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