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參數(shù)資料
| 型號(hào)： | MAX1712 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | High-Speed, Digitally Adjusted Step-Down Controllers for Notebook CPUs |
| 中文描述： | 高速、數(shù)字可調(diào)、降壓型控制器，用于筆記本電腦 |
| 文件頁數(shù)： | 21/28頁 |
| 文件大?。?/td> | 437K |
| 代理商： | MAX1712 |
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fy factors that influence the turn-on and turn-off times.
These factors include the internal gate resistance, gate
charge, threshold voltage, source inductance, and PC
board layout characteristics. The following switching loss
calculation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably including
a sanity check using a thermocouple mounted on Q1:
where C
RSS
is the reverse transfer capacitance of Q1
and I
GATE
is the peak gate-drive source/sink current (1A
typ).
For the low-side MOSFET, Q2, the worst-case power dis-
sipation always occurs at maximum battery voltage:
PD(Q2) = (1 - V
OUT
/ V
BATT(MAX)
)
I
LOAD2
R
DS(ON)
The absolute worst case for MOSFET power dissipation
occurs under heavy overloads that are greater than
I
LOAD(MAX)
but are not quite high enough to exceed the
current limit and cause the fault latch to trip. To protect
against this possibility, you must “overdesign” the circuit
to tolerate I
LOAD
= I
LIMIT(HIGH)
+ (LIR / 2)
I
LOAD(MAX)
,
where I
LIMIT(HIGH)
is the maximum valley current allowed
by the current-limit circuit, including threshold tolerance
and on-resistance variation. This means that the
MOSFETs must be very well heatsinked. If short-circuit
protection without overload protection is enough, a nor-
mal I
LOAD
value can be used for calculating component
stresses.
Choose a Schottky diode D1 having a forward voltage
low enough to prevent the Q2 MOSFET body diode from
turning on during the dead time. As a general rule, a
diode having a DC current rating equal to 1/3 of the load
current is sufficient. This diode is optional, and if efficien-
cy isn’t critical it can be removed.
Application Issues
Dropout Performance
The output voltage adjust range for continuous-conduc-
tion operation is restricted by the nonadjustable 500ns
(max) minimum off-time one-shot. For best dropout per-
formance, use the slowest (200kHz) on-time setting.
When working with low input voltages, the duty-factor
limit must be calculated using worst-case values for on-
and off-times. Manufacturing tolerances and internal
propagation delays introduce an error to the TON K-fac-
tor. This error is higher at higher frequencies (Table 6).
Also, keep in mind that transient response performance
of buck regulators operated close to dropout is poor,
and bulk output capacitance must often be added (see
V
SAG
equation in the
Design Procedure
).
Dropout Design Example: V
BATT
= 3V min, V
OUT
=
2V, f = 300kHz.
The required duty is (V
OUT
+ V
SW
) /
(V
BATT
- V
SW
) = (2V + 0.1V) / (3.0V - 0.1V) = 72.4%. The
worst-case on-time is (V
OUT
+ 0.075) / V
BATT
K =
2.075V / 3V
3.35μs-V
90% = 2.08μs. The IC duty-fac-
tor limitation is:
which meets the required duty.
Remember to include inductor resistance and MOSFET
on-state voltage drops (V
SW
) when doing worst-case
dropout duty-factor calculations.
All-Ceramic-Capacitor Application
Ceramic capacitors have advantages and disadvan-
tages. They have ultra-low ESR, are noncombustible, are
relatively small, and are nonpolarized. On the other
hand, they’re expensive and brittle, and their ultra-low
ESR characteristic can result in excessively high ESR
zero frequencies (affecting stability). In addition, they
can cause output overshoot when going abruptly from
full-load to no-load conditions, unless there are some
bulk tantalum or electrolytic capacitors in parallel to
absorb the stored energy in the inductor. In some cases,
there may be no room for electrolytics, creating a need
for a DC-DC design that uses nothing but ceramics.
The all-ceramic-capacitor application of Figure 7 has the
same basic performance as the 7A Standard Application
Circuit, but replaces the tantalum output capacitors with
ceramics. This design relies on having a minimum of
5m
parasitic PC board trace resistance in series with
the capacitor in order to reduce the ESR zero frequency.
This small amount of resistance is easily obtained by
locating the MAX1710/MAX1711/MAX1712 circuit 2 or 3
inches away from the CPU, and placing all the ceramic
capacitors close to the CPU. Resistance values higher
than 5m
just improve the stability (which can be
observed by examining the load-transient response
characteristic as shown in the
Typical Operating
Characteristics
). Avoid adding excess PC board trace
resistance because there’s an efficiency penalty; 5m
is
sufficient for the 7A circuit.
Output overshoot determines the minimum output
capacitance requirement. In this example, the switching
frequency has been increased to 550kHz and the induc-
tor value has been reduced to 0.5μH (compared to
300kHz and 2μH for the standard 7A circuit) in order to
DUTY
t
t
t
s
ns
ON MIN
+
)
ON MIN
(
OFF MAX
(
=
=
μ
+
=
(
)
)
.
2 08
500
80. %
(
)
(
)
(
I
)
PD switching
C
V
f
I
RSS
BATT MAX
LOAD
GATE
=
×
×
×
2
M
High-Speed, Digitally Adjusted
Step-Down Controllers for Notebook CPUs
______________________________________________________________________________________
21
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