參數(shù)資料
型號: MAX1434ECQ+TD
廠商: Maxim Integrated Products
文件頁數(shù): 8/22頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 50MSPS 100-TQFP
標準包裝: 500
位數(shù): 10
采樣率(每秒): 50M
數(shù)據(jù)接口: LVDS,串行
轉換器數(shù)目: 8
功率耗散(最大): 882mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: *
封裝/外殼: 100-TQFP 裸露焊盤
供應商設備封裝: 100-TQFP(14x14)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個差分
MAX1434
Output Data Format (
T/B) Transfer Functions
The MAX1434 output data format is either offset binary
or two’s complement, depending on the logic-input T/B.
With T/B low, the output data format is two’s comple-
ment. With T/B high, the output data format is offset
binary. The following equations, Table 2, and Figures 6
and 7 define the relationship between the digital output
and the analog input. For two’s complement (T/B = 0):
and for offset binary (T/B = 1):
where CODE10 is the decimal equivalent of the digital
output code as shown in Table 2.
Keep the capacitive load on the MAX1434 digital out-
puts as low as possible.
V
FSR
CODE
IN P
IN N
__
=
× ×
2
512
1024
10
V
FSR
CODE
IN P
IN N
__
=
× ×
2
1024
10
Octal, 10-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
16
______________________________________________________________________________________
TWO’S-COMPLEMENT DIGITAL OUTPUT CODE
(
T/B = 0)
OFFSET BINARY DIGITAL OUTPUT CODE
(
T/B = 1)
BINARY
D9
→ D0
HEXADECIMAL
EQUIVALENT
OF D9
→ D0
DECIMAL
EQUIVALENT
OF D9
→ D0
BINARY
D9
→ D0
HEXADECIMAL
EQUIVALENT
OF D9
→ D0
DECIMAL
EQUIVALENT
OF D9
→ D0
VIN_P - VIN_N (mV)
(VREFIO = 1.24V)
0111111111
0x1FF
+511
1111111111
0x3FF
+1023
+698.63
0111111110
0x1FE
+510
1111111110
0x3FE
+1022
+697.27
0000000001
0x001
+1
1000000001
0x201
+513
+1.37
0000000000
0x000
0
1000000000
0x200
+512
0
1111111111
0x3FF
-1
0111111111
0x1FF
+511
-1.37
1000000001
0x201
-511
0000000001
0x001
+1
-698.63
1000000000
0x200
-512
0000000000
0x000
0
-700.00
Table 2. Output Code Table (VREFIO = 1.24V)
DIFFERENTIAL INPUT VOLTAGE (LSB)
-509
+511
+509
-1 0 +1
-511
0x200
0x201
0x202
0x203
0x1FF
0x1FE
0x1FD
0x3FF
0x000
0x001
FSR
1 LSB =2 x FSR
1024
FSR = 700mV x VREFIO
1.24V
TWO'S-COMPLEMENT
OUTPUT
CODE
(LSB)
Figure 6. Two’s-Complement Transfer Function (T/B = 0)
DIFFERENTIAL INPUT VOLTAGE (LSB)
-509
+511
+509
-1 0 +1
-511
0x000
0x001
0x002
0x003
0x3FF
0x3FE
0x3FD
0x1FF
0x200
0x201
FSR
1 LSB =2 x FSR
1024
FSR = 700mV x VREFIO
1.24V
OFFSET
BINAR
Y
OUTPUT
CODE
(LSB)
Figure 7. Binary Transfer Function (T/B = 1)
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