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參數(shù)資料
| 型號： | MAX1434ECQ+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 12/22頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 50MSPS 100-TQFP |
| 標準包裝： | 500 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 50M |
| 數(shù)據(jù)接口： | LVDS，串行 |
| 轉換器數(shù)目： | 8 |
| 功率耗散（最大）： | 882mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | * |
| 封裝/外殼： | 100-TQFP 裸露焊盤 |
| 供應商設備封裝： | 100-TQFP（14x14） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 8 個差分 |
MAX1434
Octal, 10-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(Voltages referenced to GND)
AVDD.....................................................................-0.3V to +2.0V
CVDD.....................................................................-0.3V to +3.6V
OVDD ....................................................................-0.3V to +2.0V
IN_P, IN_N ..............................................-0.3V to (VAVDD + 0.3V)
CLK ........................................................-0.3V to (VCVDD + 0.3V)
OUT_P, OUT_N, FRAME_, CLKOUT_ ....-0.3V to (VOVDD + 0.3V)
DT, SLVS/LVDS, LVDSTEST, PLL_, T/B,
REFIO, REFADJ, CMOUT...................-0.3V to (VAVDD + 0.3V)
Continuous Power Dissipation (TA = +70°C)
TQFP (derate 47.6mW/°C above +70°C) ................3809.5mW
Operating Temperature Range ...........................-40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
ELECTRICAL CHARACTERISTICS
(VAVDD = 1.8V, VOVDD = 1.8V, VCVDD = 3.3V, VGND = 0V, external VREFIO = 1.24V, CREFIO = 0.1F, CREFP = 10F, CREFN = 10F,
fCLK = 50MHz (50% duty cycle), VDT = 0V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY (Note 4)
Resolution
N
10
Bits
Integral Nonlinearity
INL
±0.1
±1
LSB
Differential Nonlinearity
DNL
No missing codes over temperature
±0.1
±0.5
LSB
Offset Error
±0.7
%FS
Gain Error
-3
+2
%FS
ANALOG INPUTS (IN_P, IN_N)
Input Differential Range
VID
Differential input
1.4
VP-P
Common-Mode Voltage Range
VCMO
0.76
V
Common-Mode Voltage Range
Tolerance
(Note 5)
±50
mV
Differential Input Impedance
RIN
Switched capacitor load
2
k
Differential Input Capacitance
CIN
12.5
pF
CONVERSION RATE
Maximum Conversion Rate
fSMAX
50
MHz
Minimum Conversion Rate
fSMIN
4.8
MHz
Data Latency
6.5
Cycles
DYNAMIC CHARACTERISTICS (differential inputs, 4096-point FFT) (Note 4)
fIN = 5.3MHz at -0.5dBFS
61.1
Signal-to-Noise Ratio
SNR
fIN = 19.3MHz at -0.5dBFS
60
61.1
dB
fIN = 5.3MHz at -0.5dBFS
61.1
Signal-to-Noise and Distortion
(First 4 Harmonics)
SINAD
fIN = 19.3MHz at -0.5dBFS
60
61.1
dB
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFP
Junction-to-Ambient Thermal Resistance (
θJA) ...........21°C/W
Junction-to-Case Thermal Resistance (
θJC) ..................2°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
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