參數(shù)資料
型號(hào)： MAX1434ECQ+D
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 13/22頁(yè)
文件大小： 0K
描述： IC ADC 10BIT 50MSPS 100-TQFP
標(biāo)準(zhǔn)包裝： 90
位數(shù)： 10
采樣率（每秒）： 50M
數(shù)據(jù)接口： LVDS，串行
轉(zhuǎn)換器數(shù)目： 8
功率耗散（最大）： 882mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： *
封裝/外殼： 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 100-TQFP（14x14）
包裝： 托盤
輸入數(shù)目和類型： 8 個(gè)差分
MAX1434
component, excluding DC offset. SFDR is specified in
decibels relative to the carrier (dBc).
Intermodulation Distortion (IMD)
IMD is the total power of the IM2 to IM5 intermodulation
products to the Nyquist frequency relative to the total
input power of the two input tones f1 and f2. The indi-
vidual input tone levels are at -6.5dBFS. The intermodu-
lation products are as follows:
2nd-order intermodulation products (IM2): f1 + f2,
f2 - f1
3rd-order intermodulation products (IM3): 2 x f1 - f2,
2 x f2 - f1, 2 x f1 + f2, 2 x f2 + f1
4th-order intermodulation products (IM4): 3 x f1 - f2,
3 x f2 - f1, 3 x f1 + f2, 3 x f2 + f1
5th-order intermodulation products (IM5): 3 x f1 - 2
x f2, 3 x f2 - 2 x f1, 3 x f1 + 2 x f2, 3 x f2 + 2 x f1
Third-Order Intermodulation (IM3)
IM3 is the total power of the 3rd-order intermodulation
product to the Nyquist frequency relative to the total
input power of the two input tones f1 and f2. The indi-
vidual input tone levels are at -6.5dBFS. The 3rd-order
intermodulation products are 2 x f1 - f2, 2 x f2 - f1, 2 x f1
+ f2, 2 x f2 + f1.
Small-Signal Bandwidth
A small -20.5dBFS analog input signal is applied to an
ADC so that the signal’s slew rate does not limit the
ADC’s performance. The input frequency is then swept
up to the point where the amplitude of the digitized
conversion result has decreased by -3dB.
Full-Power Bandwidth
A large -0.5dBFS analog input signal is applied to an
ADC, and the input frequency is swept up to the point
where the amplitude of the digitized conversion result
has decreased by -3dB. This point is defined as full-
power input bandwidth frequency.
Gain Matching
Gain matching is a figure of merit that indicates how
well the gain of all eight ADC channels is matched to
each other. For the MAX1434, gain matching is mea-
sured by applying the same 5.3MHz, -0.5dBFS analog
signal to all analog input channels. These analog inputs
are sampled at 50Msps and the maximum deviation in
amplitude is reported in dB as gain matching in the
Electrical Characteristics table.
Phase Matching
Phase matching is a figure of merit that indicates how
well the phases of all eight ADC channels are matched
to each other. For the MAX1434, phase matching is
measured by applying the same 5.3MHz, -0.5dBFS
analog signal to all analog input channels. These ana-
log inputs are sampled at 50Msps and the maximum
deviation in phase is reported in degrees as phase
matching in the
Electrical Characteristics table.
Octal, 10-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
20
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