參數(shù)資料
型號: MAX1403EAI+T
廠商: Maxim Integrated Products
文件頁數(shù): 22/36頁
文件大小: 0K
描述: IC ADC 18BIT LP 28-SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 18
采樣率(每秒): 480
數(shù)據(jù)接口: QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 21.45mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 3 個差分,單極;3 個差分,雙極;5 個偽差分,單極;5 個偽差分,雙極
MAX1403
+3V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
______________________________________________________________________________________
29
Digital Filter
The on-chip digital filter processes the 1-bit data
stream from the modulator using a SINC3 or SINC1 fil-
ter. The SINC filters are conceptually simple, efficient,
and extremely flexible, especially where variable reso-
lution and data rates are required. Also, the filter notch
positions are easily controlled since they are directly
related to the output data rate (1 / data word period).
The SINC1 function results in a faster settling response
while retaining the same frequency response notches
as the default SINC3 filter. This allows the filter to settle
faster at the expense of resolution and quantization
noise. The SINC1 filter settles in one data word period.
With 60Hz notches (60Hz data rate), the settling time
would be 1 / 60Hz or 16.7ms, whereas the SINC3 filter
would settle in 3 / 60Hz or 50ms. Toggle between these
filter responses using the FAST bit in the global setup
register. Use SINC1 mode for faster settling and switch
to SINC3 mode when full accuracy is required. Switch from
the SINC1 to SINC3 mode by resetting the FAST bit low.
The DRDY signal will go false and will be reasserted
when valid data is available, a minimum of three data-
word periods later.
The digital filter can be bypassed by setting the MDOUT
bit in the global setup register. When MDOUT = 1, the
raw output of the modulator is directly available at DOUT.
Filter Characteristics
The MAX1403 digital filter implements both a SINC1
(sinx/x) and SINC3 (sinx/x)3 lowpass filter function. The
transfer function for the SINC3 function is that of three
cascaded SINC1 filters described in the z-domain by:
and in the frequency domain by:
where N, the decimation factor, is the ratio of the modu-
lator frequency fM to the output frequency fN.
Figure 10 shows the filter frequency response. The
SINC3 characteristic cutoff frequency is 0.262 times the
first notch frequency. This results in a cutoff frequency
of 15.72Hz for a first filter notch frequency of 60Hz. The
response shown in Figure 10 is repeated at either side
of the digital filter’s sample frequency (fM) and at either
side of the related harmonics (2fM, 3fM, . . .).
The response of the SINC3 filter is similar to that of a
SINC1 (averaging filter) filter but with a sharper rolloff.
The output data rate for the digital filter corresponds
with the positioning of the first notch of the filter’s fre-
quency response. Therefore, for the plot of Figure 10
where the first notch of the filter is at 60Hz, the output
data rate is 60Hz. The notches of this (sinx/x)3 filter are
repeated at multiples of the first notch frequency. The
SINC3 filter provides an attenuation of better than
100dB at these notches.
Determine the cutoff frequency of the digital filter by the
value loaded into CLK, X2CLK, MF1, MF0, FS1, and FS0
in the global setup register. Programming a different
cutoff frequency with FS0 and FS1 does not alter the
profile of the filter response; it changes the frequency of
the notches. For example, Figure 11 shows a cutoff fre-
quency of 13.1Hz and a first notch frequency of 50Hz.
For step changes at the input, a settling time must be
allowed before valid data can be read. The settling time
depends upon the output data rate chosen for the filter.
The settling time of the SINC3 filter to a full-scale step
input can be up to four-times the output data period.
For a synchronized step input (using the FSYNC func-
tion or the internal scanning logic), the settling time is
three-times the output data period.
H(f)
1
N
sin N
f
sin
f
M
3
=
π
H(z)
1
N
1
z
1 – z
N
1
3
=
-160
-120
-140
-100
-80
-60
-20
-40
0
406080
20
100 120 140 160 180 200
FREQUENCY (Hz)
GAIN
(dB)
fCLKIN = 2.4576MHz
MF1, 0 = 0
FS1, 0 = 1
fN = 60Hz
Figure 10. Frequency Response of the SINC3 Filter (Notch at
60Hz)
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