參數(shù)資料
型號： MAX1329BETL+T
廠商： Maxim Integrated Products
文件頁數(shù)： 47/78頁
文件大?。?/td> 0K
描述： IC DAS 12BIT 300KSPS 40-TQFN-EP
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 2,500
系列： *
MAX1329/MAX1330
12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
______________________________________________________________________________________
51
FIFOA Data Register
The FIFOA Data register stores up to 16 12-bit words that
can be used by DACA to generate a waveform.
FFADATA<11:0>: FIFOA Data bits (default = 0xXXX).
FFADATA<11:0> represents a 12-bit word that is left
justified with 4 don’t-care LSBs. A write or read opera-
tion always starts at location 1 and ends at the full FIFO
depth. Any attempt to write past the full FIFO depth
does not overwrite the data just written. Any attempt to
read past the full FIFO depth returns zeroes on DOUT.
A write to the FIFOA Data register is possible only when
the FFAE bit in the FIFOA Control register is 0. If FFAE
= 1, any write to the FIFOA Data register is ignored. A
read command is possible at any time. If BIPA = 0, the
data is interpreted as binary (0 to 4095). If BIPA = 1,
the data is interpreted as sign magnitude (-2047 to
+2047). In sign magnitude, the MSB represents the
sign bit, where 0 indicates a positive number and 1
indicates a negative number. The 11 LSBs provide the
magnitude in sign magnitude.
Table 17. DACA FIFO Depth Bit
Configuration
DPTA3
DPTA2
DPTA1
DPTA0
FIFOA DEPTH
00
1
00
01
2
00
10
3
00
11
4
01
00
5
01
6
01
10
7
01
11
8
10
00
9
10
01
10
11
10
11
12
11
00
13
11
01
14
11
10
15
11
16
MSB
NAME
FFADATA11
FFADATA10
FFADATA9
FFADATA8
FFADATA7
FFADATA6
FFADATA5
FFADATA4
DEFAULT
0000
LSB
NAME
FFADATA3
FFADATA2
FFADATA1
FFADATA0
XXXX
DEFAULT
0000
XXXX
X = Don’t care.
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