參數(shù)資料
型號: MAX13043EETD+T
廠商: Maxim Integrated Products
文件頁數(shù): 14/14頁
文件大小: 0K
描述: IC LEVEL TRANSLATOR 14-TDFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
邏輯功能: 變換器,雙向
位數(shù): 4
輸入類型: CMOS
輸出類型: CMOS
數(shù)據(jù)速率: 100Mbps
通道數(shù): 4
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 6.5ns
電源電壓: 2.2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 14-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 14-TDFN-EP(3x3)
包裝: 帶卷 (TR)
MAX13042E–MAX13045E
1.62V to 3.6V Improved High-Speed LLT
_______________________________________________________________________________________
9
Detailed Description
The MAX13042E–MAX13045E 4-channel, bidirectional
level translators provide the level shifting necessary for
100Mbps data transfer in multivoltage systems. The
MAX13042E–MAX13045E are ideally suited for level
translation in systems with four channels. Externally
applied voltages, VCC and VL, set the logic levels on
either side of the device. Logic signals present on the
VL side of the device appear as a high-voltage logic
signal on the VCC side of the device and vice-versa.
The MAX13042E–MAX13045E operate at full speed
with external drivers that source as little as 4mA output
current. Each I/O channel is pulled up to VCC or VL by
an internal 30A current source, allowing the
MAX13042E–MAX13045E to be driven by either push-
pull or open-drain drivers.
The MAX13042E–MAX13045E feature an enable (EN)
input that places the devices into a low-power shutdown
mode when driven low. The MAX13042E–MAX13045E
feature an automatic shutdown mode that disables the
part when VCC is less than VL. The state of I/O VCC_ and
I/O VL_ during shutdown is chosen by selecting the
appropriate part version (see the Ordering Information/
Selector Guide).
The MAX13042E–MAX13045E operate with VCC volt-
ages from +2.2V to +3.6V and VL voltages from +1.62V
to +3.2V.
Level Translation
For proper operation, ensure that +2.2V
≤ VCC
≤ +3.6V, +1.62V ≤ VL ≤ VCC - 0.2V. When power is
supplied to VL while VCC is missing or less than VL, the
MAX13042E–MAX13045E automatically enter a low-
power mode. The devices will also enter shutdown mode
when EN = 0V. This allows VCC to be disconnected and
still have a known state on I/O VL_. The maximum data
rate depends heavily on the load capacitance (see the
Rise/Fall Time vs. Capacitive Load graphs in the Typical
Operating Characteristics), output impedance of the
driver, and the operating voltage range.
Input Driver Requirements
The MAX13042E–MAX13045E architecture is based on
an nMOS pass gate and output accelerator stages
(Figure 6). The accelerators are active only when there
is a rising/falling edge on a given I/O. A short pulse is
then generated where the output accelerator stages
become active and charge/discharge the capacitances
at the I/Os. Due to its architecture, both input stages
become active during the one-shot pulse. This can lead
to current feeding into the external source that is driving
the translator. However, this behavior helps to speed
up the transition on the driven side.
The MAX13042E–MAX13045E have internal current
sources capable of sourcing 30A to pull up the I/O
lines. These internal-pullup current sources allow the
inputs to be driven with open-drain drivers as well as
push-pull drivers. It is not recommended to use external
pullup resistors on the I/O lines. The architecture of the
MAX13042E–MAX13045E permits either side to be dri-
ven with a minimum of 4mA drivers or larger.
Output Load Requirements
The MAX13042E–MAX13045E I/O are designed to drive
CMOS inputs. Do not load the I/O lines with a resistive
load less than 25k
Ω and do not place an RC circuit at
the input of these devices to slow down the edges. If a
slower rise/fall time is required, refer to the MAX3000E/
MAX3001E logic-level translator data sheet.
MAX13042E–MAX13045E
VL
VCC
I/O VL1
I/O VL2
I/O VL3
I/O VL4
I/O VL1
I/O VCC1
I/O VCC2
I/O VCC3
I/O VCC4
GND
EN
Functional Diagram
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