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參數(shù)資料
| 型號： | MAX1198ECM+TD |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 8BIT 100MSPS DL 48-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 100M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 314mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，雙極；2 個差分，雙極 |
MAX1198
shifted with respect to the in-phase component. At the
receiver, the QAM signal is divided down into its I and
Q components, essentially representing the modulation
process reversed. Figure 10 displays the demodulation
process performed in the analog domain, using the
dual matched 3.3V, 8-bit ADC MAX1198 and the
MAX2451 quadrature demodulator to recover and
digitize the I and Q baseband signals. Before being
digitized by the MAX1198, the mixed down-signal com-
ponents may be filtered by matched analog filters, such
as Nyquist or pulse-shaping filters, which remove
unwanted images from the mixing process, thereby
enhancing the overall signal-to-noise (SNR) perfor-
mance and minimizing intersymbol interference.
Grounding, Bypassing,
and Board Layout
The MAX1198 requires high-speed board layout design
techniques. Locate all bypass capacitors as close to
the device as possible, preferably on the same side as
the ADC, using surface-mount devices for minimum
inductance. Bypass VDD, REFP, REFN, and COM with
two parallel 0.1F ceramic capacitors and a 2.2F
bipolar capacitor to GND. Follow the same rules to
bypass the digital supply (OVDD) to OGND. Multilayer
boards with separated ground and power planes
produce the highest level of signal integrity. Consider
the use of a split ground plane arranged to match the
Dual, 8-Bit, 100Msps, 3.3V, Low-Power ADC
with Internal Reference and Parallel Outputs
18
______________________________________________________________________________________
1/4 MAX4252
MAX6066
1/4 MAX4252
1.47k
21.5k
21.5k
21.5k
21.5k
21.5k
47
3.3V
11
2
3
4
1
REFOUT
REFP
REFIN
1
F
10
F
6V
MAX1198
N = 1
REFN
29
N.C.
31
32
1
2
29
31
32
1
2
COM
REFOUT
NOTE: ONE FRONT-END REFERENCE CIRCUIT DESIGN MAY BE USED WITH UP TO 32 ADCs.
REFP
REFIN
MAX1198
N = 32
REFN
COM
2.0V AT 8mA
3
0.1
F
0.1
F
MAX4254 POWER-SUPPLY
BYPASSING. PLACE CAPACITOR
AS CLOSE AS POSSIBLE TO
THE OP AMP.
3.3V
1.47k
47
3.3V
1.5V
11
6
5
4
7
10
F
6V
1.5V AT 0mA
1.47k
47
3.3V
11
9
10
4
8
10
F
6V
0.1
F
0.1
F
0.1
F
0.1
F
0.1
F
2.2
F
10V
0.1
F
0.1
F
1.0V AT -8mA
330
F
6V
330
F
6V
330
F
6V
2.0V
1.0V
Figure 9. External Unbuffered Reference Drive with MAX4252 and MAX6066
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