參數(shù)資料
型號(hào)： MAX11665AUT+T
廠商： Maxim Integrated Products
文件頁數(shù)： 17/28頁
文件大?。?/td> 0K
描述： ADC 12BIT 500KSPS 1CH SOT23-6
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 12
采樣率（每秒）： 500k
數(shù)據(jù)接口： MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 696mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： SOT-23-6
供應(yīng)商設(shè)備封裝： SOT-23-6
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)單端，單極
24 _____________________________________________________________________________________
MAX11661–MAX11666
500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
Figure 13. Channel Select Timing Diagram
Dual-Channel Operation
The MAX11662/MAX11664/MAX11666 feature dual-input
channels. These devices use a channel-select (CHSEL)
input to select between analog input AIN1 (CHSEL = 0)
or AIN2 (CHSEL = 1). As shown in Figure 13, the CHSEL
signal is required to change between the 2nd and 12th
clock cycle within a regular conversion to guarantee
proper switching between channels.
14-Cycle Conversion Mode
The ICs can operate with 14 cycles per conversion.
Figure 14 shows the corresponding timing diagram.
Observe that DOUT does not go into high-impedance
mode. Also, observe that tACQ needs to be sufficiently
long to guarantee proper settling of the analog input
voltage. See the Electrical Characteristics table for tACQ
requirements and the Analog Input section for a descrip-
tion of the analog inputs.
Applications Information
Layout, Grounding, and Bypassing
For best performance, use PCBs with a solid ground
plane. Ensure that digital and analog signal lines are
separated from each other. Do not run analog and digital
(especially clock) lines parallel to one another or digital
lines underneath the ADC package. Noise in the VDD
power supply, OVDD, and REF affects the ADC’s perfor-
mance. Bypass the VDD, OVDD, and REF to ground with
0.1FF and 10FF bypass capacitors. Minimize capacitor
lead and trace lengths for best supply-noise rejection.
Choosing an Input Amplifier
It is important to match the settling time of the input
amplifier to the acquisition time of the ADC. The conver-
sion results are accurate when the ADC samples the
input signal for an interval longer than the input signal’s
worst-case settling time. By definition, settling time is
the interval between the application of an input voltage
step and the point at which the output signal reaches
Figure 14. 14-Clock Cycle Operation
1
DATA CHANNEL AIN1
DATA CHANNEL AIN2
SCLK
CHSEL
DOUT
CS
23456
78
910111213141516
123456
78
910111213141516
1
DOUT
SCLK
(MSB)
SAMPLE
1/fSAMPLE
tACQ
tCONVERT
CS
23
4
D10
D11
56
78
910111213141
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
00
0
相關(guān)PDF資料
PDF描述
MS27473T16F8PA CONN PLUG 8POS STRAIGHT W/PINS
MS27473T18A35SB CONN PLUG 66POS STRAIGHT W/SCKT
IDT72265LA10TFG8 IC FIFO 8KX18 LP 10NS 64QFP
MS27499E14A35SA CONN RCPT 37POS BOX MNT W/SCKT
IDT72265LA10TF8 IC FIFO 8KX18 LP 10NS 64QFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX11665EVKIT# 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX11665 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
MAX11666 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:500ksps, Low-Power,Serial 12-/10-/8-Bit ADCs
MAX11666AUB 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:500ksps, Low-Power,Serial 12-/10-/8-Bit ADCs
MAX11666AUB/V 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:500ksps, Low-Power,Serial 12-/10-/8-Bit ADCs
MAX11666AUB/V+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 1-2Ch 12-Bit 500ksps ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*