參數(shù)資料
型號: MAX11665AUT+T
廠商: Maxim Integrated Products
文件頁數(shù): 16/28頁
文件大?。?/td> 0K
描述: ADC 12BIT 500KSPS 1CH SOT23-6
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 12
采樣率(每秒): 500k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 696mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6
供應(yīng)商設(shè)備封裝: SOT-23-6
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個單端,單極
______________________________________________________________________________________ 23
MAX11661–MAX11666
500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
Supply Current vs. Sampling Rate
For applications requiring lower throughput rates, the
user can reduce the clock frequency (fSCLK) to lower
the sample rate. Figure 11 shows the typical supply
current (IVDD) as a function of sample rate (fS) for the
500ksps devices. The part operates in normal mode and
is never powered down. The user can also power down
the ADC between conversions by using the power-down
mode. Figure 12 shows for the 500ksps device that as
the sample rate is reduced, the device remains in the
power-down state longer and the average supply cur-
rent (IVDD) drops accordingly.
Figure 11. Supply Current vs. Sample Rate (Normal Operating
Mode)
Figure 12. Supply Current vs. Sample Rate (Device Powered
Down Between Conversions)
SUPPLY CURRENT vs. SAMPLING RATE
SAMPLING RATE (ksps)
I VDD
(mA)
400
300
200
100
0.5
1.0
1.5
2.0
VDD = 3V
fSCLK = VARIABLE
16 CYCLES/CONVERSIONS
0
500
SUPPLY CURRENT vs. SAMPLING RATE
SAMPLING RATE (ksps)
I VDD
(mA)
140
120
100
80
60
40
20
0.5
1.0
1.5
VDD = 3V
fSCLK = 8MHz
0
160
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MAX11666AUB/V+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 1-2Ch 12-Bit 500ksps ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32