- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9836 > MAX1133BEAP+T (Maxim Integrated Products)IC ADC 16BIT 200KSPS 20-SSOP PDF資料下載
參數(shù)資料
| 型號： | MAX1133BEAP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/19頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT 200KSPS 20-SSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,000 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 55mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 20-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個單端，單極；1 個單端，雙極 |
MAX1132/MAX1133
Most applications require an input buffer amplifier. If
the input signal is multiplexed, the input channel should
be switched immediately after acquistion, rather than
near the end of or after a conversion. This allows more
time for the input buffer amplifier to respond to a large
step-change in input signal. The input amplifier must
have a high enough slew-rate to complete the required
output voltage change before the beginning of the
acquisition time. At the beginning of acquisition, the
capacitive DAC is connected to the amplifier output,
causing some output disturbance. Ensure that the sam-
pled voltage has settled to within the required limits
before the end of the acquisition time. If the frequency
of interest is low, AIN can be bypassed with a large
enough capacitor to charge the capacitive DAC with
very little change in voltage. However, for AC use, AIN
must be driven by a wideband buffer (at least 10MHz),
which must be stable with the DACs capacitive load (in
parallel with any AIN bypass capacitor used) and also
settle quickly (Figures 8 or 9).
Digital Noise
Digital noise can couple to AIN and REF. The conver-
sion clock (SCLK) and other digital signals that are
active during input acquisition contribute noise to the
conversion result. If the noise signal is synchronous to
the sampling interval, an effective input offset is pro-
duced. Asynchronous signals produce random noise
on the input, whose high-frequency components may
be aliased into the frequency band of interest. Minimize
noise by presenting a low impedance (at the frequen-
cies contained in the noise signal) at the inputs. This
requires bypassing AIN to AGND, or buffering the input
with an amplifier that has a small-signal bandwidth of
several MHz, or preferably both. AIN has a bandwidth
of about 4MHz.
Offsets resulting from synchronous noise (such as the
conversion clock) are canceled by the MAX1132/
MAX1133’s calibration scheme. The magnitude of the
offset produced by a synchronous signal depends on
the signal’s shape. Recalibration may be appropriate if
the shape or relative timing of the clock or other digital
signals change, as might occur if more than one clock
signal or frequency is used.
Distortion
Avoid degrading dynamic performance by choosing an
amplifier with distortion much less than the MAX1132/
MAX1133’s THD (-90dB) at frequencies of interest. If
the chosen amplifier has insufficient common-mode
rejection, which results in degraded THD performance,
use the inverting configuration to eliminate errors from
common-mode voltage. Low temperature-coefficient
resistors reduce linearity errors caused by resistance
changes due to self-heating. To reduce linearity errors
due to finite amplifier gain, use an amplifier circuit with
sufficient loop gain at the frequencies of interest.
DC Accuracy
If DC accuracy is important, choose a buffer with an
offset much less than the MAX1132/MAX1133’s maxi-
mum offset (±6mV), or whose offset can be trimmed
while maintaining good stability over the required tem-
perature range.
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
14
______________________________________________________________________________________
Table 3. Unipolar Full Scale and Zero Scale
PART
REFERENCE
ZERO SCALE
FULL SCALE
Internal
0
+12V
MAX1132
External
0
+12(VREF/4.096)
Internal
0
+4.096V
MAX1133
External
0
+VREF
Table 4. Bipolar Full Scale, Zero Scale, and Negative Scale
PART
REFERENCE
NEGATIVE FULL
SCALE
ZERO SCALE
FULL SCALE
Internal
-12V
0
+12V
MAX1132
External
-12(VREF/4.096)
0
+12(VREF/4.096)
Internal
-4.096V
0
+4.096V
MAX1133
External
-VREF
0+VREF
相關PDF資料 |
PDF描述 |
|---|---|
| MS27484E16A55P | CONN PLUG 55POS STRAIGHT W/PINS |
| MS27468T17F99SA | CONN RCPT 23POS JAM NUT W/SCKT |
| MS27505E21F16S | CONN RCPT 16POS BOX MNT W/SCKT |
| MAX154AEWG+ | IC ADC 8BIT 4CH W/MUX&REF 24SOIC |
| MAX1188BEUP+ | IC ADC 16BIT 135KSPS 20-TSSOP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1133EVKIT | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Evaluation Kit for the MAX1132/MAX1133 |
| MAX1134 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:16-Bit ADCs, 150ksps, 3.3V Single Supply |
| MAX11340 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:500ksps, 12-/10-Bit, 4-/8-/16-Channel ADCs |
| MAX11340ATJ+ | 功能描述:模數(shù)轉換器 - ADC 10-Bit 16Ch 500ksps SAR ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11340ATJ+T | 制造商:Maxim Integrated Products 功能描述:3MSPS, LO-PWR, SERIAL 12-/10-BIT, 8-/16-CHANNEL ADCS W. FLEX - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC ADC 10BIT 500KSPS 32TQFN-EP 制造商:Maxim Integrated Products 功能描述:10-Bit 16Ch 500ksps SAR ADC |
發(fā)布緊急采購，3分鐘左右您將得到回復。