參數(shù)資料
型號： MAX1133BEAP+T
廠商： Maxim Integrated Products
文件頁數(shù)： 17/19頁
文件大?。?/td> 0K
描述： IC ADC 16BIT 200KSPS 20-SSOP
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 2,000
位數(shù)： 16
采樣率（每秒）： 200k
數(shù)據(jù)接口： MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 55mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
供應商設備封裝： 20-SSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個單端，單極；1 個單端，雙極
MAX1132/MAX1133
16-Bit ADC, 200ksps, 5V Single-Supply
with Reference
_______________________________________________________________________________________
7
Typical Operating Characteristics (continued)
(MAX1132/MAX1133: AVDD = DVDD = +5V , fSCLK = 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps),
bipolar input, external REF = +4.096V, 0.22F bypassing on REFADJ, 2.2F on REF, 1F on CREF, TA = 25°C, unless otherwise noted.)
0
0.1
100
10
1
SFDR PLOT
120
MAX1132
toc10
FREQUENCY (kHz)
AMPLITUDE
(dB)
100
80
60
40
10
20
30
110
90
70
50
fSAMPLE = 200kHz
-110
0.1
100
10
1
THD PLOT
0
MAX1132
toc11
FREQUENCY (kHz)
AMPLITUDE
(dB)
-10
-30
-50
-70
-100
-90
-80
-20
-40
-60
fSAMPLE = 200kHz
PIN
NAME
FUNCTION
1
REF
Reference Buffer Output/ADC Reference Input. Reference voltage for analog-to-digital conversion. In
internal reference mode, the reference buffer provides a +4.096V nominal output, externally adjustable at
REFADJ. In external reference mode, disable the internal buffer by pulling REFADJ to AVDD. Bypass to
AGND with a 2.2F capacitor when using the internal reference.
2
REFADJ
Bandgap Reference Output/Bandgap Reference Buffer Input. Bypass to AGND with 0.22F. When using an
external reference, connect REFADJ to AVDD to disable the internal bandgap reference.
3
AGND
Analog Ground. This is the primary analog ground (Star Ground).
4AVDD
Analog Supply. 5V ±5%. Bypass AVDD to AGND (pin 3) with a 0.1F capacitor.
5
DGND
Digital Ground
6
SHDN
Shutdown Control Input. Drive
SHDN low to put the ADC in shutdown mode.
7
P2
User-Programmable Output 2
8
P1
User-Programmable Output 1
9
P0
User-Programmable Output 0
10
SSTRB
Serial Strobe Output. In internal clock mode, SSTRB goes low when the ADC begins a conversion and goes
high when the conversion is finished. In external clock mode, SSTRB pulses high for one clock period
before the MSB decision. It is high impedance when
CS is high in external clock mode.
11
DOUT
Serial Data Output. MSB first, straight binary format for unipolar input, two’s complement for bipolar input.
Each bit is clocked out of DOUT at the falling edge of SCLK.
12
RST
Reset Input. Drive
RST low to put the device in the power-on default mode. See the Power-On Reset section.
Pin Description
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