參數(shù)資料
型號(hào): MAX11043ATL+
廠商: Maxim Integrated Products
文件頁數(shù): 7/33頁
文件大?。?/td> 0K
描述: IC ADC 16BIT W/DAC 40-TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
類型: ADC,DAC
分辨率(位): 16 b
采樣率(每秒): 9.6M
數(shù)據(jù)接口: 串行
電壓電源: 模擬和數(shù)字
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-TQFN-EP(6x6)
包裝: 管件
MAX11043
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
15
Maxim Integrated
Programmable Gain Amplifier
Each ADC channel features an input buffer with input
impedance of at least 5k
and programmable gain of
eight or 16. When set to a gain of one, the signal
bypasses the PGA to reduce noise.
The PGA features an optional 20dB/decade analog EQ
mode, with a gain of 0dB near 8kHz and attenuation
above 190kHz to reduce out-of-band noise. Using the
digital EQ filter adds another 20dB/decade of gain and
sets the 0dB frequency to 5kHz. Control the EQ and
PGA gain from their respective CONFIG_ registers. For
additional filtering and equalization, use the integrated
digital filters.
Digital-to-Analog Converter
The MAX11043 features a 12-bit fine DAC with high and
low reference inputs set by the 8-bit, dual tap coarse DAC
or driven externally. The output buffer of the fine DAC has
a gain of two and can drive 10k
and 200pF in parallel.
Bypass the REFDACH and REFDACL with a 1F capaci-
tor when using the coarse DAC to set the reference
values, or power down the buffers and drive REFDACH
and REFDACL with external references. Alternatively
drive one of the fine DAC references using the coarse
DAC and the other using an external reference.
The fine DAC register contains the current value of the
output. The output value changes by writing to this reg-
ister or by the rising edge of the DACSTEP input. The
DAC register updates on the next rising edge of the
system clock following the rising edge of the DACSTEP
input. The programmable DACSTEP register contains
the step size. The UP/DWN input sets the direction of
the step. Drive UP/DWN high to step up, drive low to
step down.
The coarse 8-bit, dual tap DAC generates the high and
low reference values for the fine DAC. Obtain the
coarse DAC reference from the main reference or by
driving the REFDAC input externally. The main refer-
ence, REFBP, is divided by two before the coarse DAC.
When driving REFDAC, REFDACH, or REFDACL direct-
ly, ensure the voltage to the fine DAC does not exceed
AVDD/2 to prevent the output amplifier from saturating.
EQ FILTER OUTPUT
MAX11043
fig06
SAMPLE
OUTPUT
(LSB)
80
60
20
40
-15,000
-10,000
-5000
0
5000
10,000
15,000
20,000
25,000
30,000
35,000
-20,000
0100
Figure 6. EQ Filter Response to a Step Input
STAGE 1 FILTER OUTPUT
MAX11043
fig08
SAMPLE
OUTPUT
(LSB)
40
10
30
20
0
500
1000
1500
2000
2500
3000
3500
-500
050
Figure 8. Stage 1 Default Filter Response to a Step Input
LP FILTER OUTPUT
MAX11043
fig07
SAMPLE
OUTPUT
(LSB)
80
60
40
20
500
1000
1500
2000
2500
0
100
Figure 7. LP Filter Response to a Step Input
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