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參數(shù)資料
| 型號(hào)： | MAX1003CAX+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 6BIT 90MSPS DL 36-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 6 |
| 采樣率（每秒）： | 90M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 941mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-BSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 36-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個(gè)單端，單極；2 個(gè)差分，單極 |
MAX1003
Single-ended and differential AC-coupled input circuits
are shown in Figures 2 and 3. Each of the amplifier
inputs is internally biased to a 2.35V reference through
a 20k
resistor, eliminating external DC bias circuits. A
series 0.1F capacitor is required at each amplifier
input for AC-coupled signals.
When operating with AC-coupled inputs, the input
amplifiers’ DC offset voltage is nulled to within ±1/2LSB
by an on-chip offset-correction amplifier. An external
compensation capacitor is required to set the dominant
pole of the offset-correction amplifier’s frequency
response (Figures 2 and 3). The compensation capaci-
tor will determine the low-frequency corner of the ana-
log input response according to the following formula:
fc = 1 / (0.1 x C)
where C is the value of the compensation capacitor in
F, and fc is the corner frequency in Hz.
Low-Power, 90Msps, Dual 6-Bit ADC
6
_______________________________________________________________________________________
0
DIV
90Msps
DATA
BUFFER
TANK
MODCTL
CAR
SYNTHESIZER
FIN
IIN
AGC
CLK IN
DSP
QIN
ADC CLOCK
6 BITS
TANK
LO
TSA5055
or EQUIV.
90
MOD GND
AGC
IOUT
QOUT
VCC
FROM TANK VOLTAGE
VARACTOR-TUNED
PRESELECTION FILTER
EXTERNAL
VCO
OR
KU BAND
75
CABLE
950MHz TO 2150MHz
F-CONNECTOR
INPUT
MAX2102
MAX1003
DATA
BUFFER
LO
RFIN
LNB
6 BITS
Figure 1. Commercial Satellite Receiver System
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