參數(shù)資料
型號: MA28140
廠商: Dynex Semiconductor Ltd.
英文描述: Packet Telecommand Decoder
中文描述: 包遙控解碼器
文件頁數(shù): 37/72頁
文件大小: 857K
代理商: MA28140
MA28140
37/72
Figure 20: Recovery LAC Value Storage
A diagram of two possible implementations is given in
Figure 20.
The RAM mapping is organized in such a way that the PTD
is able to use the following external RAM buffers:
two buffers working in a flip-flop mode between transfer
and segmentation layer, respectively called Front End
and Back End buffer.
one buffer used by the CPDU interface
The buffer management is described in section 4.2. The
memory mapping is defined in tables 5 and 6.
PTD
LADR
LDAT 8
RWN
RAMCSN
LACCS
AD
DAT
WE
CS
RAM
BACK-UP POWER
VDD
VSS
AUTSL
AUEXT
Case 1: RAM is used to store the 8 bits of Recovery LAC counter
PTD
LADR
LDAT 8
RWN
RAMCSN
LACCS
AD
DAT
RAM
NON-VOLATILE
VSS
VSS
AUTSL
AUEXT
DAT
WE
LAC value
CS
Case 2: A device different from the RAM is used to store the 8 bits of Recovery LAC counter
WE
CS
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