
MA17503
25/34
Test
Conditions
(1)(2)
No.
Parameter
Min
Typ
Max
(3)
Units
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
SYNCLKN
↓
to Data Valid
Data Valid after SYNCLKN
↓
SYNCLKN
↑
to IRDYN Valid
IRDYN Valld after SYNCLKN
↓
SYNCLKN
↓
to IRN Valid
IRN Valid after SYNCLKN
↓
SYNCLKN
↓
to PIFN Valid
PIFN Valld after SYNCLKN
↓
SYNCLKN
↓
to SURE, NPU, PAUSEN Valid
SURE, NPU, ILLADN, PAUSEN after SYNCLKN
↓
SYNCLKN
↓
to ILLADN
↑
TCLK
↓
to ILLADN
↓
(Bus Timeout)
EXADEN to ILLADN Valid
TCLK
↓
to IRDYN
↓
(Bus Timeout)
SYNCLKN
↑
to CONFWN Valid
CONFWN Valid After SYNCLKN
↓
SYNCLKN
↓
to DMAEN Valid
DMAE Valid after SYNCLKN
↓
SYNCLKN
↓
to DMAKN Valid
DMAKN Valid after SYNCLKN
↓
DTIMERN
↓
to DMAEN
↓
DTIMERN
↓
to DMAEN
↑
DTIMERN Setup to SYNCLKN
↓
DTIMERN Hold after SYNCLKN
↓
DTIMERN Setup to TGCLK
↑
DTIMERN Hold after TGCLK
↓
TGCLK
↓
to TGON
↓
SYNCLKN
↑
to TGON
↑
TGON Valid after SYNCLKN
↑
DSN
↓
to DDN
↓
DSN
↑
to DDN
↑
DMAKN to DDN, CDN Valid
HLDAKN to DDN, CDN Valid
DMARN Setup to SYNCLKN
↓
DMARN Hold after SYNCLKN
↓
DTON Setup to TCLK
↓
DTON Hold after TCLK
↓
Address/Command Setup to SYNCLKN
↑
Address/Command Hold after SYNCLKN
↑
Data Setup to SYNCLKN
↓
Data Hold after SYNCLKN
↓
Microcode Setup to SYNCLKN
↓
Microcode Hold after SYNCLKN
↓
Interrupts Setup to SYNCLKN
↓
Interrupts Hold after SYNCLKN
↓
Faults Setup to SYNCLKN
↓
Faults Hold after SYNCLKN
↓
Bus Fault Timeout Interval (4)
INTREN Setup to SYNCLKN
↓
INTREN Hold after SYNCLKN
↓
M/ION Setup to SYNCLKN
↓
M/ION Hold after SYNCLKN
↓
HLDAKN Setup to SYNCLKN
↓
HLDAKN Hold after SYNCLKN
↓
TCLK Setup to SYNCLKN
↓
TCLK Hold after SYNCLKN
↓
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
-
3r+100
-
40
-
60
-
50
-
50
-
75
75
60
50
75
-
75
-
50
-
60
60
-
-
-
-
150
75
-
35
35
30
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
30
-
10
-
15
-
15
-
15
-
-
-
-
-
10
-
5
-
5
-
-
50
10
30
12
-
-
15
10
10
-
-
20
10
30
10
50
10
50
5
10
20
20
10
20
15
1
30
5
40
5
20
7
15
10
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
Load 1
TCLK
ns
ns
ns
ns
ns
ns
ns
ns
Mil-Std-883, Method 5005, Subgroups 9, 10, 11.
(1) T
= +25
°
C, -55
°
C and +125
°
C tested at V
= 4.5V and 5.5V.
(2) Unless otherwise noted: VIL
≥
0.9V, VIH
≤
4.0V timing measured from 50% to 50% points.
(3) r = 1OSC period 0.5r implies 50% OSC duty cycle.
(4) Data obtained by characterization or analysis; not routinely measured.
Table 7b: Timing Parameter Values