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參數(shù)資料
| 型號： | M6MGT166S4BWG |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Series RC1083 rocker switches rated to 15 amp and snap-in panel mount |
| 中文描述： | 3.3的CMOS只快閃記憶體 |
| 文件頁數(shù)： | 8/30頁 |
| 文件大?。?/td> | 259K |
| 代理商： | M6MGT166S4BWG |
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Apr. 1999 , Rev.1.7
MITSUBISHI LSIs
16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS
3.3V-ONLY FLASH MEMORY &
4,194,304-BIT (262,144-WORD BY 16-BIT) CMOS SRAM
Stacked-CSP (Chip Scale Package)
M6MGB/T166S4BWG
SOFTWARE COMMAND DEFINITION
Command List
1) In the word-wide version, upper byte data (DQ8-DQ15) is ignored.
2) IA=ID Code Address : A0=VIL (Manufacturer's Code) : A0=VIH (Device Code), ID=ID Code
3) Bank = Bank Address (Bank(I) or Bank(II)) : F-A19-F-A17.
4) SRD = Status Register Data
5) Word Program, Single Data Load and Page Buffer to Flash Command is valid for only Bank(I).
6) WA = Write Address,WD = Write Data
7) WA0,WAn=Write Address, WD0,WDn=Write Data.
Write Address and Write Data must be provided sequentially from 00H to 7FH for A6-A0. Page size is 128word (128word x 16bit).
and also F-A19-F-A17,A16-A7(Block Address, Page Address) must be valid.
8) WA = Write Address : Upper page address, F-A19-F-A17,A16-A7(Block Address, Page Address) must be valid.
9) BA = Block Address : BA = Block Address : F-A19-F-A17,A16-A14(Bank1) F-A19-F-A17,A16-A15(Bank2)
10) DQ6 provides Block Lock Status, DQ6 = 1 : Block Unlock, DQ6 = 0 : Block Locked.
8
Read Array
Device Identifier
Read Status Register
Clear Status Register
Clear Page Buffer
FFH
90H
70H
50H
55H
X
X
Write
Write
Write
Write
Write
1st bus cycle
2nd bus cycle
Command
ID
IA
Bank
Read
Read
SRD
X
X
2)
4)
2)
Page Program
Single Data Load to Page Buffer
Page Buffer to Flash
Write
Write
Write
41H
74H
0EH
Block Erase / Confirm
Suspend
Resume
Read Lock Bit Status
Lock Bit Program / Confirm
Erase All Unlocked Blocks
7)
Write
Write
Write
Write
Write
Write
Write
20H
B0H
D0H
Bank
Bank
X
Bank
X
D0H
Write
Write
71H
77H
9)
A7H
Read
BA
BA
X
D0H
D0H
DQ6
Word Program
5)
Write
40H
Write
Write
Write
Write
WD0
WD
D0H
7)
7)
WD
10)
1)
1)
WA
WA
3)
Write
X
D0H
5)
5)
Bank
Bank(I)
Bank
Bank(I)
5)
Bank(I)
5)
WA
WA0
Bank
BA
WDn
Write
7)
7)
WAn
3rd ~129th bus cycles (Word Mode)
1)
1)
Address
Mode
Data
(DQ15-0)
Address
Mode
Data
(DQ15-0)
Address
Mode
Data
(DQ15-0)
1)
6)
6)
8)
5)
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