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參數(shù)資料
| 型號： | M48T86MH1E |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.330 INCH, ROHS COMPLIANT, PLASTIC, SOH-28 |
| 文件頁數(shù)： | 13/36頁 |
| 文件大?。?/td> | 352K |
| 代理商： | M48T86MH1E |
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Obsolete
Product(s)
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Product(s)
Clock operations
M48T86
3.11
Register B
3.11.1
SET
When the SET bit is a '0,' the update transfer functions normally by advancing the counts
once per second. When the SET bit is written to a '1,' any update transfer is inhibited and
the program may initialize the time and calendar bytes without an update occurring. READ
cycles can be executed in a similar manner. SET is a READ/WRITE bit which is not modified
by RST or internal functions of the M48T86.
3.11.2
PIE: periodic interrupt enable
The Periodic Interrupt Enable bit (PIE) is a READ/WRITE bit which allows the Periodic
Interrupt Flag (PF) bit in Register C to cause the IRQ pin to be driven low (see Figure 10 on
page 21 for the relationship between PIE and UIE). When the PIE bit is set to '1,' periodic
interrupts are generated by driving the IRQ pin low at a rate specified by the RS3-RS0 bits
of Register A. A '0' in the PIE bit blocks the IRQ output from being driven by a periodic
interrupt, but the Periodic Flag (PF) bit is still set at the periodic rate. PIE is not modified by
any internal M48T86 functions, but is cleared to '0' on RST.
3.11.3
AIE: alarm interrupt enable
The Alarm Interrupt Enable (AIE) bit is a READ/WRITE bit which, when set to a '1,' permits
the Alarm Flag (AF) bit in Register C to assert IRQ. An alarm interrupt occurs for each
second that the three time bytes equal the three alarm bytes including a “Don't care” alarm
code of binary 1XXXXXXX. When the AIE bit is set to '0,' the AF bit does not initiate the IRQ
signal. The RST pin clears AIE to '0.' The internal functions of the M48T86 do not affect the
AIE Bit.
3.11.4
UIE: update ended interrupt enable
The Update Ended Interrupt Enable (UIE) bit is a READ/WRITE bit which enables the
Update End Flag (UF) bit in Register C to assert IRQ. A transition low on the RST pin or the
SET bit going high clears the UIE bit.
3.11.5
SQWE: square wave enable
When the Square Wave Enable (SQWE) bit is set to a '1,' a square wave signal is driven out
on the SQW pin. The frequency is determined by the rate-selection bits RS3-RS0. When the
SQWE bit is set to '0,' the SQW pin is held low. The SQWE bit is cleared by the RST pin.
SQWE is a READ/WRITE bit.
3.11.6
DM: data mode
The Data Mode (DM) bit indicates whether time and calendar information are in binary or
BCD format. The DM bit is set by the program to the appropriate format and can be read as
required. This bit is not modified by internal function or RST. A '1' in DM signifies binary data
and a '0' specifies binary coded decimal (BCD) data.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T86MH1F | 功能描述:實(shí)時(shí)時(shí)鐘 5 Volt PC Drop-In RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M48T86MH1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 V PC real-time clock |
| M48T86PC | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5V PC REAL TIME CLOCK |
| M48T86PC1 | 功能描述:實(shí)時(shí)時(shí)鐘 5 Volt PC Drop-In RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| M48T86PC1 | 制造商:STMicroelectronics 功能描述:IC - Real Time Clock |
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