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參數(shù)資料
| 型號： | M393T6453FG3-CC |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | DDR2 Registered SDRAM MODULE 240pin Registered Module based on 256Mb F-die 72-bit ECC |
| 中文描述： | 注冊的DDR2 SDRAM內(nèi)存模塊240針腳注冊模塊，基于256Mb的F -死72位ECC |
| 文件頁數(shù)： | 2/18頁 |
| 文件大?。?/td> | 387K |
| 代理商： | M393T6453FG3-CC |
Rev. 1.3 Aug. 2005
256MB, 512MB Registered DIMMs
DDR2 SDRAM
DDR2 Registered DIMM Ordering Information
Note: “Z” of Part number(11th digit) stand for Lead-free products.
Note: “3” of Part number(12th digit) stand for Dummy Pad PCB products.
Note: "A" of Part number(12th digit) stand for Parity Register products.
Part Number
Density
Organization
Component Composition
Number of Rank
Parity Register
Height
M393T3253FG(Z)3-CD5/CC
256MB
32Mx72
32Mx8(K4T56083QF)*9EA
1
X
30mm
M393T3253FG(Z)0-CD5/CC
256MB
32Mx72
32Mx8(K4T56083QF)*9EA
1
X
30mm
M393T3253FZA-CE6/D5/CC
256MB
32Mx72
32Mx8(K4T56083QF)*9EA
1
O
30mm
M393T6453FG(Z)3-CD5/CC
512MB
64Mx72
32Mx8(K4T56083QF)*18EA
2
X
30mm
M393T6453FG(Z)0-CD5/CC
512MB
64Mx72
32Mx8(K4T56083QF)*18EA
2
X
30mm
M393T6453FZA-CE6/D5/CC
512MB
64Mx72
32Mx8(K4T56083QF)*18EA
2
O
30mm
M393T6450FG(Z)3-CD5/CC
512MB
64Mx72
64Mx4(K4T56043QF)*18EA
1
X
30mm
M393T6450FG(Z)0-CD5/CC
512MB
64Mx72
64Mx4(K4T56043QF)*18EA
1
X
30mm
M393T6450FZA-CE6/D5/CC
512MB
64Mx72
64Mx4(K4T56043QF)*18EA
1
O
30mm
Features
Performance range
JEDEC standard 1.8V ± 0.1V Power Supply
V
DDQ
= 1.8V ± 0.1V
200 MHz f
CK
for 400Mb/sec/pin, 267MHz f
CK
for 533Mb/sec/pin, 333MHz f
CK
for 667Mb/sec/pin
4 Banks
Posted CAS
Programmable CAS Latency: 3, 4, 5
Programmable Additive Latency: 0, 1 , 2 , 3 and 4
Write Latency(WL) = Read Latency(RL) -1
Burst Length: 4 , 8(Interleave/nibble sequential)
Programmable Sequential / Interleave Burst Mode
Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
Off-Chip Driver(OCD) Impedance Adjustment
On Die Termination
Average Refresh Period 7.8us at lower than T
CASE
85
°
C, 3.9us at 85
°
C < T
CASE
< 95
°
C
Serial presence detect with EEPROM
DDR2 SDRAM Package: 60ball FBGA - 64Mx4/32Mx8
All of Lead-free products are compliant for RoHS
Note : For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram.
E6 (DDR2-667)
D5 (DDR2-533)
CC (DDR2-400)
Unit
Speed@CL3
400
400
400
Mbps
Speed@CL4
533
533
400
Mbps
Speed@CL5
667
-
-
Mbps
CL-tRCD-tRP
5-5-5
4-4-4
3-3-3
CK
Address Configuration
Organization
Row Address
Column Address
Bank Address
Auto Precharge
64Mx4(256Mb) based Module
A0-A12
A0-A9,A11
BA0-BA1
A10
32Mx8(256Mb) based Module
A0-A12
A0-A9
BA0-BA1
A10
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M393T6453FG3-CD5/CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Registered SDRAM MODULE 240pin Registered Module based on 256Mb F-die 72-bit ECC |
| M393T6453FZ0-CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Registered SDRAM MODULE 240pin Registered Module based on 256Mb F-die 72-bit ECC |
| M393T6453FZ0-CD5/CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Registered SDRAM MODULE 240pin Registered Module based on 256Mb F-die 72-bit ECC |
| M393T6453FZ3-CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Registered SDRAM MODULE 240pin Registered Module based on 256Mb F-die 72-bit ECC |
| M393T6453FZ3-CD5/CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Registered SDRAM MODULE 240pin Registered Module based on 256Mb F-die 72-bit ECC |
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