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參數(shù)資料
| 型號： | M38C59GFHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 6.25 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 24/71頁 |
| 文件大?。?/td> | 939K |
| 代理商： | M38C59GFHP |
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Rev.2.00
Nov 23, 2005
page 30 of 75
REJ03B0098-0200
38C5 Group (One Time PROM version)
q Frequency Divider For Timer
Each timer X and timer Y have the frequency dividers for the count
source. The count source of the frequency divider is switched to XIN,
XCIN, or the on-chip oscillator in the on-chip oscillator mode by the
CPU mode register. The division ratio of each timer can be controlled
by each timer division ratio selection bit. The division ratio can be
selected from as follows;
1/1, 1/2, 1/16, 1/256 of f(XIN), f(XCIN) or f(ROSC)/4.
q Timer X
The timer X count source can be selected by setting the timer X
mode register. When XCIN is selected as the count source, a pulse
input from XCIN can be counted.
The timer X operates as down-count. When the timer contents reach
“000016”, an underflow occurs at the next count pulse and the timer
latch contents are reloaded. After that, the timer continues count-
down. When the timer underflows, the interrupt request bit corre-
sponding to the timer X is set to “1”.
Six operating modes can be selected for timer X by the timer X mode
register and timer X control register.
(1) Timer Mode
The count source can be selected by setting the timer X mode regis-
ter. In this mode, timer X operates as the 18-bit counter by setting the
timer X register (extension).
(2) Pulse Output Mode
Pulses of which polarity is inverted each time the timer underflows
are output from the TXOUT1 pin. Except for that, this mode operates
just as in the timer mode.
When using this mode, set the port sharing the TXOUT1 pin to output
mode.
(3) IGBT Output Mode
After dummy output from the TXOUT1 pin, count starts with the INT0
pin input as a trigger. In the case that the timer X1 output edge switch
bit is “0”, when the trigger is detected or the timer X underflows, “H” is
output from the TXOUT1 pin. And then, when the count value corre-
sponds with the compare register 1 value, the TXOUT1 output be-
comes “L”.
After noise is cleared by noise filters, judging continuous 4-time same
levels with sampling clocks to be signals, the INT0 signal can use 4
types of delay time by a delay circuit.
When using this mode, set the port sharing the INT0 pin to input
mode and set the port sharing the pin used as TXOUT1 or TXOUT2
function to output mode.
When the timer X output control bit 1 or 2 of the timer X control reg-
ister is set to “1”, the timer X count stop bit is fixed to “1” forcibly by
the interrupt signal of INT1 or INT2. And then, the TXOUT1 output and
TXOUT2 output can be set to “L” forcibly at the same time that the
timer X stops counting.
Do not write “1” to the timer X register (extension) when using the
(4) PWM Mode
IGBT dummy output, an external trigger with the INT0 pin and output
control with pins INT1 and INT2 are not used. Except for those, this
mode operates just as in the IGBT output mode.
The period of PWM waveform is specified by the timer X set value. In
the case that the timer X1 output edge switch bit is “0”, the “H” inter-
val is specified by the compare register 1 set value. In the case that
the timer X2 output edge switch bit is “0”, the “H” interval is specified
by the compare registers 2 and 3 set values.
When using this mode, set the port sharing the pin used as TXOUT1
or TXOUT2 function to output mode.
Do not write “1” to the timer X register (extension) when using the
PWM mode.
(5) Event Counter Mode
The timer counts signals input through the CNTR0 pin. In this mode,
timer X operates as the 18-bit counter by setting the timer X register
(extension). When using this mode, set the port sharing the CNTR0
pin to input mode.
In this mode, the window control can be performed by the timer 1
underflow. When the bit 5 (data for control of event counter window)
of the timer X mode register is set to “1”, counting is stopped at the
next timer 1 underflow. When the bit is set to “0”, counting is re-
started at the next timer 1 underflow.
(6) Pulse Width Measurement Mode
In this mode, the count source is the output of frequency divider for
timer. In this mode, timer X operates as the 18-bit counter by setting
the timer X register (extension). When the bit 6 of the CNTR0 active
edge switch bits is “0”, counting is executed during the “H” interval of
CNTR0 pin input. When the bit is “1”, counting is executed during the
“L” interval of CNTR0 pin input. When using this mode, set the port
sharing the CNTR0 pin to input mode.
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相關(guān)代理商/技術(shù)參數(shù) |
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| M38C59GFHP#U0 | 制造商:Renesas Electronics Corporation 功能描述:MCU 2/4V 60K PB-FREE - Trays |
| M38D20F1XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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