參數(shù)資料
型號(hào): M38C24M4-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù): 86/91頁(yè)
文件大?。?/td> 1867K
代理商: M38C24M4-XXXFP
A - 2
REVISION HISTORY
M32C/87 Group Datasheet
57
58
60
61
62
64
65
66
69
70
71
72
73
Electrical Characteristics
Table 5.22 Memory Expansion Mode and Microprocessor Mode th(WR-
DB)
expression on note 1 modified
Table 5.23 Memory Expansion Mode and Microprocessor Mode th(WR-
DB)
expression on note 1 modified; th(ALE-AD) expression on note 4
modified
Figure 5.3 Vcc1=Vcc2=5V Timing Diagram (1) tac1(RD-DB)
expression
on note 2 modified; th(WR-DB) and tw(ER) expressions on note 3 modified;
tcyc
expression added
Figure 5.4 Vcc1=Vcc2=5V Timing Diagram (2) tac2(RD-DB) and tac2(AD-
DB)
expressions on note 1 modified; th(ALE-AD) expressions on notes 1
and 2 modified; td(DB-WR) expression on note 2 modified; tcyc expression
added
Figure 5.5 Vcc1=Vcc2=5V Timing Diagram (3)
NMI input diagram added
Table 5.24 Electrical Characteristics
VOH values changed;RPULLUP and
Icc values modified
Table 5.25 A/D Conversion Characteristics tCONV
value modified
Table 5.28 Memory Expansion Mode and Microprocessor Mode
tac1(RD-DB)
expression on note 1 modified; tac2(RD-DB) expression on
note 1 added
Table 5.40 Memory Expansion Mode and Microprocessor Mode
th(BCLK-AD), th(BCLK-CS) and th(BCLK-RD)
values modified; th(WR-AD)
expression on note 1 modified
Table 5.41 Memory Expansion Mode and Microprocessor Mode
th(BCLK-AD), th(BCLK-CS) and th(BCLK-RD)
values modified; th(WR-AD)
expression on note 1 modified; th(ALE-AD) expression on note 4 modified
Figure 5.7 Vcc1=Vcc2=3.3V Timing Diagram (1) th(BCLK-AD), th(BCLK-
CS)
and th(BCLK-RD)
values modified; tac1(AD-DB) expression on note 2
modified; th(WR-DB), th(WR-AD) and tw(WR) expression on note 3 modified;
tcyc
expression added
Figure 5.8 Vcc1=Vcc2=3.3V Timing Diagram (2) tac2(RD-DB) and
tac1(AD-DB)
expressions on note 1 modified; th(ALE-AD) expressions on
notes 1 and 2 modified; td(WR-AD), td(DB-WR) and th(WR-DB) expressions
on note 2 modified; tcyc expression added
Figure 5.9 Vcc1=Vcc2=3.3V Timing Diagram (3)
NMI input diagram
added
1.01
Aug. 29, 05
17
Overview
Tables 1.6 Pin Description
Intelligent I/O functions modified
29
Special Function Register (SFR)
The G1BCR0 register Value after reset modified
The G1BCR1 register Value after reset modified
49
Electrical Characteristics
Table 5.3 Electrical Characteristics
ICC standard value modified
Rev.
Date
Description
Page
Summary
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