參數(shù)資料
型號： M38507M8A-XXXSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDIP42
封裝： 13 X 36.72 MM, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁數(shù)： 36/90頁
文件大?。?/td> 899K
代理商： M38507M8A-XXXSP
Rev.2.10
2005.11.14
page 39 of 86
REJ03B0093-0210
3850 Group (Spec.A)
Fig. 44 Structure of MISRG
[MISRG (MISRG)] 003816
MISRG consists of three control bits (bits 1 to 3) for middle-speed
mode automatic switch and one control bit (bit 0) for oscillation
stabilizing time set after STP instruction released.
By setting the middle-speed mode automatic switch start bit to “1”
while operating in the low-speed mode and setting the middle-
speed mode automatic switch set bit to “1”, XIN oscillation
automatically starts and the mode is automatically switched to the
middle-speed mode.
Fig. 45 System clock generating circuit block diagram (Single-chip mode)
MISRG
(MISRG : address 003816)
Oscillation stabilizing time set after STP instruction
released bit
0: Automatically set “0116” to Timer 1,
“FF16” to Prescaler 12
1: Automatically set nothing
b7
b0
Note: When the mode is automatically switched from the low-speed mode to
the middle-speed mode, the value of CPU mode register (address 003B16)
changes.
Not used (return “0” when read)
Middle-speed mode automatic switch start bit
(Depending on program)
0: Invalid
1: Automatic switch start
Middle-speed mode automatic switch wait time set bit
0: 6.5 to 7.5 machine cycles
1: 4.5 to 5.5 machine cycles
Middle-speed mode automatic switch set bit
0: Not set automatically
1: Automatic switching enable
WIT instruction
STP instruction
Timing
φ (internal clock)
S
R
Q
STP instruction
S
R
Q
Main clock stop bit
S
R
Q
1/2
1/4
XIN
XOUT
XCOUT
XCIN
Interrupt request
Reset
Interrupt disable flag l
1/2
Port XC
switch bit
“1”
“0”
Low-speed mode
High-speed or
middle-speed
mode
Middle-speed mode
High-speed or
low-speed mode
Main clock division ratio
selection bits (Note 1)
Notes 1: Any one of high-speed, middle-speed or low-speed mode is selected by bits 7 and 6 of the CPU mode register.
When low-speed mode is selected, set port Xc switch bit (b4) to “1”.
2: f(XIN)/16 is supplied as the count source to the prescaler 12 at reset, the count source
before executing the STP instruction is supplied as the count source at executing STP instruction.
3: When bit 0 of MISRG = “0”, the prescaler 12 is set to "FF16" and timer 1 is set to "0116".
When bit 0 of MISRG = “1”, set the sufficient time for oscillation of used oscillator to stabilize since nothing is set to
the prescaler 12 and timer 1.
4: Although a feed-back resistor exists on-chip, an external feed-back resistor may be needed depending on conditions.
Main clock division ratio
selection bits (Note 1)
Prescaler 12
Timer 1
Reset or
STP instruction
(Note 2)
Reset
(Note 3)
Timer 12 count
source selection
bit
(Note 4)
相關(guān)PDF資料
PDF描述
M38504M6A-XXXFP 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDSO42
M38503M4A-XXXSP 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDIP42
M38503M4A-XXXFP 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDSO42
M38504M6A-XXXSP 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDIP42
M38513M4-XXXFP 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO42
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M3851 BK001 制造商:Alpha Wire Company 功能描述:CBL 7COND 14AWG BLK 1000'
M3851 BK002 制造商:Alpha Wire Company 功能描述:CBL 7COND 14AWG BLK 500'
M3851 BK005 制造商:Alpha Wire Company 功能描述:CBL 7COND 14AWG BLK 100'
M38510/00102BCB 制造商:n/a 功能描述:38510/00102 S6I6B 制造商: 功能描述: 制造商:undefined 功能描述:
M38510/00103BCA 制造商:QP Semiconductor 功能描述:NAND GATE, TRIPLE 3-INPUT
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*