參數(shù)資料
型號(hào)： M38507M8A-XXXSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDIP42
封裝： 13 X 36.72 MM, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁(yè)數(shù)： 2/90頁(yè)
文件大小： 899K
代理商： M38507M8A-XXXSP
Rev.2.10
2005.11.14
page 8 of 86
REJ03B0093-0210
3850 Group (Spec.A)
Table 4 Push and pop instructions of accumulator or processor status register
Accumulator
Processor status register
Push instruction to stack
PHA
PHP
Pop instruction from stack
PLA
PLP
Fig. 6 Register push and pop at interrupt generation and subroutine call
Note: Condition for acceptance of an interrupt
Interrupt enable flag is “1”
Execute JSR
On-going Routine
M (S)(PCH)
(S)
(S) – 1
M (S)(PCL)
Execute RTS
(PCL)M (S)
(S)
(S)– 1
(S)
(S) + 1
(S)
(S) + 1
(PCH)M (S)
Subroutine
POP return
address from stack
Push return address
on stack
M (S)(PS)
Execute RTI
(PS)M (S)
(S)
(S) – 1
(S)
(S) + 1
Interrupt
Service Routine
POP contents of
processor status
register from stack
M (S)(PCH)
(S)
(S) – 1
M (S)(PCL)
(S)
(S) – 1
(PCL)M (S)
(S)
(S) + 1
(S)
(S) + 1
(PCH)M (S)
POP return
address
from stack
I Flag is set from “0” to “1”
Fetch the jump vector
Push return address
on stack
Push contents of processor
status register on stack
Interrupt request
(Note)
Interrupt disable flag is “0”
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