![](http://datasheet.mmic.net.cn/30000/M38507F8FP_datasheet_2360437/M38507F8FP_246.png)
3-38
APPENDIX
3850 Group (Spec. H) User’s Manual
3.3 Notes on use
3.3.9 Notes on RESET pin
(1)
Connecting capacitor
In case where the RESET signal rise time is long, connect a ceramic capacitor or others across the
RESET pin and the VSS pin. Use a 1000 pF or more capacitor for high frequency use. When
connecting the capacitor, note the following :
Make the length of the wiring which is connected to a capacitor as short as possible.
Be sure to verify the operation of application products on the user side.
q Reason
If the several nanosecond or several ten nanosecond impulse noise enters the RESET pin, it may
cause a microcomputer failure.
(2)
Reset release after power on
When releasing the reset after power on, such as power-on reset, release reset after XIN passes more
than 20 cycles in the state where the power supply voltage is 2.7 V or more and the XIN oscillation
is stable.
q Reason
To release reset, the RESET pin must be held at an “L” level for 20 cycles or more of XIN in the
state where the power source voltage is between 2.7 V and 5.5 V, and XIN oscillation is stable.
3.3.10 Notes on using stop mode
sRegister setting
Since values of the prescaler 12 and Timer 1 are automatically reloaded when returning from the
stop mode, set them again, respectively. (When the oscillation stabilizing time set after STP
instruction released bit is “0”)
When using the oscillation stabilizing time set after STP instruction released bit set to “1”, evaluate
time to stabilize oscillation of the used oscillator and set the value to the timer 1 and prescaler 12.
sClock restoration
After restoration from the stop mode to the normal mode by an interrupt request, the contents of
the CPU mode register previous to the STP instruction execution are retained. Accordingly, if both
main clock and sub clock were oscillating before execution of the STP instruction, the oscillation
of both clocks is resumed at restoration.
In the above case, when the main clock side is set as a system clock, the oscillation stabilizing
time for approximately 8,000 cycles of the XIN input is reserved at restoration from the stop mode.
At this time, note that the oscillation on the sub clock side may not be stabilized even after the
lapse of the oscillation stabilizing time of the main clock side.
3.3.11 Notes on wait mode
sClock restoration
If the wait mode is released by a reset when XCIN is set as the system clock and XIN oscillation is
stopped during execution of the WIT instruction, XCIN oscillation stops, XIN oscillations starts, and
XIN is set as the system clock.
In the above case, the RESET pin should be held at “L” until the oscillation is stabilized.