參數(shù)資料
型號： M38504M6A-XXXFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDSO42
封裝： 8.40 X 17.50 MM, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數(shù)： 25/59頁
文件大小： 885K
代理商： M38504M6A-XXXFP
Rev.2.13
Apr 17, 2009
Page 31 of 56
REJ03B0125-0213
3850 Group (Spec.A QzROM version)
PWM (PWM: Pulse Width Modulation)
The 3850 group (spec.A) has a PWM function with an 8-bit
resolution, based on a signal that is the clock input XIN or that
clock input divided by 2.
Data Setting
The PWM output pin also functions as port P44. Set the PWM
period by the PWM prescaler, and set the “H” term of output
pulse by the PWM register.
If the value in the PWM prescaler is n and the value in the PWM
register is m (where n = 0 to 255 and m = 0 to 255):
PWM period = 255 × (n+1) / f(XIN)
= 31.875 × (n+1)
s
(when f(XIN) = 8 MHz, count source selection bit = “0”)
Output pulse “H” term = PWM period × m / 255
= 0.125 × (n+1) × m
s
(when f(XIN) = 8 MHz, count source selection bit = “0”)
PWM Operation
When bit 0 (PWM enable bit) of the PWM control register is set
to “1”, operation starts by initializing the PWM output circuit,
and pulses are output starting at an “H”.
If the PWM register or PWM prescaler is updated during PWM
output, the pulses will change in the cycle after the one in which
the change was made.
Fig 29. Timing of PWM period
Fig 30. Block diagram of PWM function
31.875
× m × (n+1)
255
s
T = [31.875
× (n+1)] s
PWM output
m : Contents of PWM register
n : Contents of PWM prescaler
T : PWM period (when f(XIN) = 8 MHz, count source
selection bit = “0”)
Data bus
Count source
selection bit
“0”
“1”
PWM
prescaler pre-latch
PWM
register pre-latch
PWM
prescaler latch
PWM
register latch
Transfer control circuit
PWM register
1/2
XIN
(XCIN at low-speed mode)
Port P44 latch
PWM function enable bit
Port P44
PWM prescaler
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