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| 型號(hào)： | M3823AGFHP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件頁(yè)數(shù)： | 62/76頁(yè) |
| 文件大?。?/td> | 896K |
| 代理商： | M3823AGFHP |
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Rev.2.02
Jun 19, 2007
page 65 of 73
REJ03B0146-0202
3823 Group
P00–P07, P10–P17, P20–P27 (Note 1)
P41–P47, P50–P57, P60–P67, P70, P71 (Note 1)
P00–P07, P10–P17, P20–P27 (Note 1)
P41–P47, P50–P57, P60–P67, P70, P71 (Note 1)
P00–P07, P10–P17, P20–P27 (Note 1)
P41–P47, P50–P57, P60–P67, P70, P71 (Note 1)
P00–P07, P10–P17, P20–P27 (Note 1)
P41–P47, P50–P57, P60–P67, P70, P71 (Note 1)
P00–P07, P10–P17 (Note 2)
P20–P27, P41–P47, P50–P57, P60–P67, P70, P71
(Note 2)
P00–P07, P10–P17 (Note 2)
P20–P27, P41–P47, P50–P57, P60–P67, P70, P71
(Note 2)
P00–P07, P10–P17 (Note 3)
P20–P27, P41–P47, P50–P57, P60–P67, P70, P71
(Note 3)
P00–P07, P10–P17 (Note 3)
P20–P27, P41–P47, P50–P57, P60–P67, P70, P71
(Note 3)
–40
40
–20
20
–2
–5
(VCC = 1.8 to 5.5 V, Ta = –20 to 85 °C, unless otherwise noted)
Notes 1: The total output current is the sum of all the currents flowing through all the applicable ports. The total average current is an average value
measured over 100 ms. The total peak current is the peak value of all the currents.
2: The peak output current is the peak current flowing in each port.
3: The average output current is an average value measured over 100 ms.
4: When the A/D converter is used, refer to the recommended operating condition for A/D converter.
5: When using the microcomputer in low-speed mode, make sure that the sub-clock input oscillation frequency on condition that f(XCIN) < f(XIN)/3.
“H” total peak output current
“L” total peak output current
“H” total average output current
“L” total average output current
“H” peak output current
ΣIOH(peak)
ΣIOL(peak)
ΣIOH(avg)
ΣIOL(avg)
IOH(peak)
Symbol
Parameter
Limits
Min.
mA
Unit
Typ.
Max.
IOL(peak)
IOH(avg)
IOL(avg)
5
10
–1.0
–2.5
mA
“L” peak output current
“H” average output current
“L” average output current
Input frequency for timers X and Y
(duty cycle 50%)
IOL(avg)
f(CNTR0)
f(CNTR1)
MHz
kHz
(4.5 V ≤ VCC ≤ 5.5 V)
(4.0 V ≤ VCC ≤ 4.5 V)
(2.0 V ≤ VCC ≤ 4.0 V)
(VCC ≤ 2.0 V)
Frequency/2 mode
(4.5 V ≤ VCC ≤ 5.5 V)
Frequency/2 mode
(4.0 V ≤ VCC ≤ 4.5 V)
Frequency/2 mode
(2.0 V ≤ VCC ≤ 4.0 V)
Frequency/2 mode
(1.8 V ≤ VCC ≤ 2.0 V)
Frequency/4 mode
(2.5 V ≤ VCC ≤ 5.5 V)
Frequency/4 mode
(2.0 V ≤ VCC ≤ 2.5 V)
Frequency/4 mode
(1.8 V ≤ VCC ≤ 2.0 V)
Frequency/8 mode
(2.5 V ≤ VCC ≤ 5.5 V)
Frequency/8 mode
(2.0 V ≤ VCC ≤ 2.5 V)
Frequency/8 mode
(1.8 V ≤ VCC ≤ 2.0 V)
32.768
Main clock input oscillation frequency
(duty cycle 50%)
(Note 4)
Sub-clock input oscillation frequency
(duty cycle 50%)
(Note 5)
f(XIN)
2.5
5.0
2 VCC – 4
0.75 VCC + 1
6.25 VCC - 10
10.0
4 VCC – 8
1.5 VCC + 2
12.5 VCC - 20
10.0
4 VCC
15 VCC – 22
10.0
4 VCC
15 VCC – 22
80
Table 17 Recommended operating conditions (3)
f(XCIN)
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