
2.7 LCD drive control circuit
APPLICATION
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3822 GROUP USER’S MANUAL
(2) Ports P0, P1 and P34–P37
When pins P34/SEG12–P37/SEG15, P00/SEG16–P07/SEG23, P10/SEG24–P17/SEG31 are not used as
segment outputs, they can be used as input ports P34–P37 and as I/O ports P0 and P1.
Table 2.7.4 shows the setting of input ports P34–P37 and I/O ports P0, P1.
Ports
Table 2.7.4 Setting of input ports P34–P37 and I/O ports P0, P1
(3) P34–P37, P0 and P1 pull-down pins
When pins P34/SEG12–P37/SEG15, P00/SEG16–P07/SEG23, P10/SEG24–P17/SEG31 are not used as
ports, it is possible to exert pull-down control. Table 2.7.5 shows the setting of pull-down pins.
Pins
Table 2.7.5 Setting of pull-down pins
P34–P37
P00, P01
P02–P07
P10, P11
P12
P13–P17
Setting
By setting bit 0 of the segment output enable register (address 003816) to “0,” then
setting bit 3 of PULL register A (address 001616) to “1.”
By setting bits 1 and 2 of the segment output enable register (address 003816) to “0,”
next setting bit 0 of the port P0 direction register (address 000116) to “0,” then setting
bit 0 of PULL register A (address 001616) to “1.”
Setting
By setting bit 0 of segment output enable register (address 003816) to “0”
By setting bit 1 of segment output enable register (address 003816) to “0”
By setting bit 2 of segment output enable register (address 003816) to “0”
By setting bit 3 of segment output enable register (address 003816) to “0”
By setting bit 4 of segment output enable register (address 003816) to “0”
By setting bit 5 of segment output enable register (address 003816) to “0”
By setting bits 3 to 5 of the segment output enable register (address 0038 16) to “0,”
next setting bit 1 of the port P1 direction register (address 000316) to “0,” then setting
bit 1 of PULL register A (address 001616) to “1.”
P34/SEG12–
P37/SEG15
P00/SEG16–
P07/SEG23
P10/SEG24–
P17/SEG31