
APPLICATION
2.5 Serial I/O1
3820 GROUP USER’S MANUAL
2–129
2.5.4 Register setting example
(1) Clock synchronous serial I/O mode
Figure 2.5.18 and Figure 2.5.19 show a transmitting method in the clock synchronous mode. Figure
2.5.20 and Figure 2.5.21 show a receiving method in the clock synchronous mode.
Fig. 2.5.18 Transmitting method in clock synchronous mode (1)
SIO1CON: Serial I/O1 control register [Address 1A
16
]
b0: BRG count source selection bit
0: f(X
IN
)
1: f(X
IN
)/4
b1: Serial I/O1 synchronization clock selection bit
(In clock synchronous mode)
0: BRG output/4
1: External clock input
b7
1 1
b0
b2: S
RDY1
output enable bit
0: P4
7
/S
RDY1
pin operates as I/O port P4
7
1: P4
7
/S
RDY1
pin operates as signal output pin S
RDY1
(S
RDY1
signal indicates receive enable state)
b3: Transmit interrupt source selection bit
0: When transmit buffer has emptied
1: When transmit shift operation is completed
b4: Transmit enable bit
1: Transmit enabled
b5: Receive enable bit
0: Receive disabled
1: Receive enabled
b6: Serial I/O1 mode selection bit
1: Clock synchronous serial I/O1 mode
b7: Serial I/O1 enable bit
1: Serial I/O1 enabled
(pins P4
4
–P4
7
operate as serial I/O1 pins)
Setting of serial I/O1 control register
Selection of clock synchronous, transmit, or others
Disable Serial I/O1 transmit interrupt
b7
b0
0
ICON1: Interrupt control register 1 [Address 3E
16
]
b3: Serial I/O1 transmit interrupt enable bit
0: Interrupts disabled
Set the value to baud rate generator (BRG) [Address 1C
16
]
1
Continued to Figure 2.5.19
[Notes on use]
Notes 1:
To use an INT pin or input port for watching S
RDY1
, set as required.
2:
When an external clock is selected in setting
below, BRG setting is not required in
setting
below.
3:
In the full duplex data transfer mode, set the receive enable bit (bit 5) to “1” (receive
enabled) in setting
below.
4:
To use a serial I/O1 transmit interrupt, set in the following sequence.
5:
When no serial I/O1 transmit interrupt is used, omit settings
,
,
,
and
below.