參數(shù)資料
型號(hào)： M38039M4-XXXKP
廠商： Renesas Technology Corp.
英文描述： 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 68/119頁(yè)
文件大?。?/td> 1575K
代理商： M38039M4-XXXKP
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Rev.1.00
REJ03B0212-0100
Apr 2, 2007
Page 68 of 117
3803 Group (Spec.L)
Fig 66. State transitions of system clock
CM
4
: Port X
C
switch bit
0 : I/O port function (stop oscillating)
1 : X
CIN-
X
COUT
oscillating function
CM
5
: Main clock (X
IN
-X
OUT
) stop bit
0 : Operating
1 : Stopped
CM
7
, CM
6
: Main clock division ratio selection bit
b7 b6
0 0 :
φ
= f(X
IN
)/2 (High-speed mode)
0 1 :
φ
= f(X
IN
)/8 (Middle-speed mode)
1 0 :
φ
= f(X
CIN
)/2 (Low-speed mode)
1 1 : Not available
Reset
C
4
“
←
”
CM
“0
←→
”1
CM
“1
←→
”0
CM
4
“1
←→
”0
CM
6
“1
←→
”0
C
7
“
←
”
C
4
“
←
”
C
5
“
←
”
CM
6
“1”
←→
”0”
CM
6
“1”
←→
”0”
CPU mode register
(CPUM : address 003B
16
)
b7
b4
CM
“0
←→
”1
CM
“1
←→
”0
High-speed mode
(f(
φ
) = 4 MHz)
CM
7
=0
CM
6
=0
CM
5
=0 (8 MHz oscillating)
CM
4
=0 (32 kHz stopped)
High-speed mode
(f(
φ
) = 4 MHz)
CM
7
=0
CM
6
=0
CM
5
=0 (8 MHz oscillating)
CM
4
=1 (32 kHz oscillating)
Notes1
: Switch the mode by the allows shown between the mode blocks. (Do not switch between the modes directly without an allow.)
2
: The all modes can be switched to the stop mode or the wait mode and return to the source mode when the stop mode or the
wait mode is ended.
3
: Timer operates in the wait mode.
4
: When the stop mode is ended, a delay of approximately 1 ms occurs by connecting prescaler 12 and Timer 1 in middle/high-
speed mode.
5
: When the stop mode is ended, a delay of approximately 0.25 s occurs by Timer 1 and Timer 2 in low-speed mode.
6
: Wait until oscillation stabilizes after oscillating the main clock X
IN
before the switching from the low-speed mode to middle/
high-speed mode.
7
: The example assumes that 8 MHz is being applied to the X
IN
pin and 32 kHz to the X
CIN
pin.
φ
indicates the internal clock.
Middle-speed mode
(f(
φ
) = 1 MHz)
CM
7
=0
CM
6
=1
CM
5
=0 (8 MHz oscillating)
CM
4
=0 (32 kHz stopped)
Middle-speed mode
(f(
φ
) = 1 MHz)
CM
7
=0
CM
6
=1
CM
5
=0 (8 MHz oscillating)
CM
4
=1 (32 kHz oscillating)
Low-speed mode
(f(
φ
) = 16 kHz)
CM
7
=1
CM
6
=0
CM
5
=0 (8 MHz oscillating)
CM
4
=1 (32 kHz oscillating)
Low-speed mode
(f(
φ
) = 16 kHz)
CM
7
=1
CM
6
=0
CM
5
=1 (8 MHz stopped)
CM
4
=1 (32 kHz oscillating)
相關(guān)PDF資料
PDF描述
M38039M4-XXXSP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38039M4-XXXWG SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38039M5L-XXXHP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38039M5L-XXXKP 9-Mbit (256K x 36/512K x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
M38039M5L-XXXSP 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
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M3806 BK001 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 1000'
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