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參數(shù)資料
| 型號： | M378T3354BG3-CD5 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | RES 120 OHM 1/6W 5% CARBON FILM |
| 中文描述： | 240針腳緩沖模塊基于512Mb乙芯片64/72-bit Non-ECC/ECC |
| 文件頁數(shù)： | 2/22頁 |
| 文件大?。?/td> | 466K |
| 代理商： | M378T3354BG3-CD5 |
Rev. 1.5 Aug. 2005
256MB, 512MB, 1GB Unbuffered DIMMs
DDR2 SDRAM
DDR2 Unbuffered DIMM Ordering Information
Note: “Z” of Part number(11th digit) stand for Lead-free products.
Note: “3” of Part number(12th digit) stand for Dummy Pad PCB products.
Part Number
Density
Organization
Component Composition
Number of Rank
Height
x64 Non ECC
M378T3354BG(Z)3-CD5/CC
256MB
32Mx64
32Mx16(K4T51163QB)*4
1
30mm
M378T3354BG(Z)0-CD5/CC
256MB
32Mx64
32Mx16(K4T51163QB)*4
1
30mm
M378T6553BG(Z)3-CD5/CC
512MB
64Mx64
64Mx8(K4T51083QB)*8
1
30mm
M378T6553BG(Z)0-CD5/CC
512MB
64Mx64
64Mx8(K4T51083QB)*8
1
30mm
M378T2953BG(Z)3-CD5/CC
1GB
128Mx64
64Mx8(K4T51083QB)*16
2
30mm
M378T2953BG(Z)0-CD5/CC
1GB
128Mx64
64Mx8(K4T51083QB)*16
2
30mm
x72 ECC
M391T6553BG(Z)3-CD5/CC
512MB
64Mx72
64Mx8(K4T51083QB)*9
1
30mm
M391T6553BG(Z)0-CD5/CC
512MB
64Mx72
64Mx8(K4T51083QB)*9
1
30mm
M391T2953BG(Z)3-CD5/CC
1GB
128Mx72
64Mx8(K4T51083QB)*18
2
30mm
M391T2953BG(Z)0-CD5/CC
1GB
128Mx72
64Mx8(K4T51083QB)*18
2
30mm
Features
Performance range
JEDEC standard 1.8V ± 0.1V Power Supply
V
DDQ
= 1.8V ± 0.1V
200 MHz f
CK
for 400Mb/sec/pin, 267MHz f
CK
for 533Mb/sec/pin
4 Banks
Posted CAS
Programmable CAS Latency: 3, 4, 5
Programmable Additive Latency: 0, 1 , 2 , 3 and 4
Write Latency(WL) = Read Latency(RL) -1
Burst Length: 4 , 8(Interleave/nibble sequential)
Programmable Sequential / Interleave Burst Mode
Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
Off-Chip Driver(OCD) Impedance Adjustment
On Die Termination
Average Refresh Period 7.8us at lower than a T
CASE
85
°
C, 3.9us at 85
°
C < T
CASE
< 95
°
C
-
support
High Temperature Self-Refresh rate enable feature
Package: 60ball FBGA - 64Mx8 , 84ball FBGA - 32Mx16
All of Lead-free products are compliant for RoHS
Note: For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram.
D5(DDR2-533)
CC(DDR2-400)
Unit
Speed@CL3
400
400
Mbps
Speed@CL4
533
400
Mbps
Speed@CL5
-
-
Mbps
CL-tRCD-tRP
4-4-4
3-3-3
CK
Address Configuration
Organization
Row Address
Column Address
Bank Address
Auto Precharge
64Mx8(512Mb) based Module
A0-A13
A0-A9
BA0-BA1
A10
32Mx16(512Mb) based Module
A0-A12
A0-A9
BA0-BA1
A10
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M378T3354BGZ0-CD5/CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:240pin Unbuffered Module based on 512Mb B-die 64/72-bit Non-ECC/ECC |
| M378T3354BGZ3-CD5/CC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:240pin Unbuffered Module based on 512Mb B-die 64/72-bit Non-ECC/ECC |
| M378T3354CZ0-CCC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb C-die 64/72-bit Non-ECC/ECC |
| M378T3354CZ0-CD5 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb C-die 64/72-bit Non-ECC/ECC |
| M378T3354CZ0-CE6 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb C-die 64/72-bit Non-ECC/ECC |
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