參數(shù)資料
型號(hào): M378T3354BG3-CD5
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: RES 120 OHM 1/6W 5% CARBON FILM
中文描述: 240針腳緩沖模塊基于512Mb乙芯片64/72-bit Non-ECC/ECC
文件頁(yè)數(shù): 18/22頁(yè)
文件大?。?/td> 466K
代理商: M378T3354BG3-CD5
Rev. 1.5 Aug. 2005
256MB, 512MB, 1GB Unbuffered DIMMs
DDR2 SDRAM
Parameter
Symbol
DDR2-533
DDR2-400
Units
Notes
min
max
min
max
Write postamble
tWPST
0.4
0.6
0.4
0.6
tCK
Write preamble
tWPRE
0.35
x
0.35
x
tCK
Address and control input hold time
tIH
375
x
475
x
ps
Address and control input setup time
tIS
250
x
350
x
ps
Read preamble
tRPRE
0.9
1.1
0.9
1.1
tCK
Read postamble
tRPST
0.4
0.6
0.4
0.6
tCK
Active to active command period for 1KB page size
products
tRRD
7.5
x
7.5
x
ns
Active to active command period for
2KB page size products
tRRD
10
x
10
x
ns
Four Activate Window for 1KB page size products
tFAW
37.5
37.5
ns
Four Activate Window for 2KB page size products
tFAW
50
50
ns
CAS to CAS command delay
tCCD
2
2
tCK
Write recovery time
tWR
15
x
15
x
ns
Auto precharge write recovery + precharge time
tDAL
tWR+tRP
x
tWR+tRP
x
tCK
Internal write to read command delay
tWTR
7.5
x
10
x
ns
Internal read to precharge command delay
tRTP
7.5
7.5
ns
Exit self refresh to a non-read command
tXSNR
tRFC + 10
tRFC + 10
ns
Exit self refresh to a read command
tXSRD
200
200
tCK
Exit precharge power down to any non-read command
tXP
2
x
2
x
tCK
Exit active power down to read command
tXARD
2
x
2
x
tCK
Exit active power down to read command
(Slow exit, Lower power)
tXARDS
6 - AL
6 - AL
tCK
CKE minimum pulse width
(high and low pulse width)
t
CKE
3
3
tCK
ODT turn-on delay
t
AOND
2
2
2
2
tCK
ODT turn-on
t
AON
tAC(min)
tAC(max)+1
tAC(min)
tAC(max)+1
ns
ODT turn-on(Power-Down mode)
t
AONPD
tAC(min)+2
2tCK+tAC(m
ax)+1
tAC(min)+2
2tCK+tAC
(max)+1
ns
ODT turn-off delay
t
AOFD
2.5
2.5
2.5
2.5
tCK
ODT turn-off
t
AOF
tAC(min)
tAC(max)+ 0.6
tAC(min)
tAC(max)+ 0.6
ns
ODT turn-off (Power-Down mode)
t
AOFPD
tAC(min)+2
2.5tCK+
tAC(max)+1
tAC(min)+2
2.5tCK+
tAC(max)+1
ns
ODT to power down entry latency
tANPD
3
3
tCK
ODT power down exit latency
tAXPD
8
8
tCK
OCD drive mode output delay
tOIT
0
12
0
12
ns
Minimum time clocks remains ON after CKE asynchronously drops LOW
tDelay
tIS+tCK +tIH
tIS+tCK +tIH
ns
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