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參數(shù)資料
| 型號： | M37640M4T |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 26/48頁 |
| 文件大小： | 563K |
| 代理商： | M37640M4T |
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MITSUBISHI
ELECTRIC
26
MITSUBISHI MICROCOMPUTERS
7630 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Fig. 24
Timing of clock synchronous SI/O function (LSB first selected)
Fig. 25
Structure of serial I/O control register (
φ
is internal system clock)
Clock Asynchronous Serial I/O (UART)
The UART is a full duplex asynchronous transmit/receive unit. The
built-in clock divider and baud rate generator enable a broad range
of transmission speeds. Please refer to Block diagram of UART.
(1) Description
The transmit and receive shift registers have a buffer (consisting of
high and low order byte) each. Since the shift registers cannot be
written to or read from directly, transmit data is written to the trans-
mit buffer and receive data is read from the receive buffer. A trans-
mit or receive operation will be triggered by the transmit enable bit
and receive enable bit of the UART control register UCON (see
Structure of UART control register). The double function terminals
P2
5
/UT
X
D, P2
6
/URTS and P2
4
/UR
X
D, P2
7
/UCTS will be switched to
serve as UART pins automatically.
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
Serial input SIN
Serial Output SOUT
write signal to SIO
receive enable signal S
RDY
transfer clock
SIO interrupt request bit = “1”
Note: When an internal clock is selected, S
OUT
pin will change to high impedance after 8 bits of data have been transmitted.
synchronous clock
Clock divider selection bits
b2 b1 b0
0 0 0:
φ
divided by 4
0 0 1:
φ
divided by 8
0 1 0:
φ
divided by 16
0 1 1:
φ
divided by 32
1 0 0:
φ
divided by 64
1 0 1:
φ
divided by 128
1 1 0:
φ
divided by 256
1 1 1:
φ
divided by 512
P2
0
/S
IN
, P2
1
/S
OUT
and P2
2
/S
CLK
function selection bit
0 :
I/O port function
1 :
SI/O function
P2
3
/S
RDY
function selection bit
0 :
I/O port function
1 :
SI/O function
Transmission order selection bit
0 :
LSB first
1 :
MSB first
Synchronization clock selection bit
0 :
use external clock
1 :
use internal clock
Not used (“0” when read)
7
0
SIO control register (address 0013
16
)
SIOCON
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