參數(shù)資料
型號(hào): M37540E8GP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁數(shù): 35/64頁
文件大?。?/td> 668K
代理商: M37540E8GP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7540 Group
MITSUBISHI MICROCOMPUTERS
35
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Reset Circuit
The microcomputer is put into a reset status by holding the RESET
pin at the “L” level for 2 μs or more when the power source voltage is
2.2 to 5.5 V and X
IN
is in stable oscillation.
After that, this reset status is released by returning the RESET pin to
the “H” level. The program starts from the address having the con-
tents of address FFFD
16
as high-order address and the contents of
address FFFC
16
as low-order address.
In the case of f(
φ
)
4 MHz, the reset input voltage must be 0.8 V or
less when the power source voltage passes 4.0 V.
In the case of f(
φ
)
2 MHz, the reset input voltage must be 0.48 V or
less when the power source voltage passes 2.4 V.
In the case of f(
φ
)
1 MHz, the reset input voltage must be 0.44 V or
less when the power source voltage passes 2.2 V.
Fig. 40 Example of reset circuit
Fig. 41 Timing diagram at reset
(Note)
0.2 V
CC
0 V
0 V
Poweron
V
CC
RESET
V
CC
RESET
Power source
voltage
detection circuit
Power source
voltage
Reset input
voltage
Note :
Reset release voltage Vcc
= 2.2 V
Data
Address
8-13 clock cycles
Reset address from the
vector table
1 :
A built-in ring oscillator applies about RING2 MHz,
f
250 kHz frequency clock
at average of Vcc = 5 V.
2 :
The mark “” means that the address is changeable depending on the previous state.
3 :
These are all internal signals except RESET.
Notes
f
RESET
RESET
OUT
SYNC
FFFC
FFFD
AD
H
,AD
L
AD
L
AD
H
Clock from built-in
ring oscillator RING
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