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參數(shù)資料
| 型號(hào)： | M37540 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Single Chip 8 Bits CMOS Microcomputer(8位單片機(jī)) |
| 中文描述： | 單芯片的CMOS 8位單片機(jī)（8位單片機(jī)） |
| 文件頁數(shù)： | 28/64頁 |
| 文件大?。?/td> | 668K |
| 代理商： | M37540 |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7540 Group
MITSUBISHI MICROCOMPUTERS
28
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Fig. 29 Block diagram of UART serial I/O1
(2) Asynchronous Serial I/O (UART) Mode
Clock asynchronous serial I/O mode (UART) can be selected by
clearing the serial I/O1 mode selection bit of the serial I/O1 control
register to “0”.
Eight serial data transfer formats can be selected, and the transfer
formats used by a transmitter and receiver must be identical.
The transmit and receive shift registers each have a buffer, but the
two buffers have the same address in memory. Since the shift
register cannot be written to or read from directly, transmit data is
written to the transmit buffer register, and receive data is read from
the receive buffer register.
The transmit buffer register can also hold the next data to be trans-
mitted, and the receive buffer register can hold a character while
the next character is being received.
X
IN
1/4
OE
PE FE
1/16
1/16
Data bus
Receive buffer register
Address 0018
16
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Baud rate generator
Address 001C
16
Frequency division ratio 1/(n+1)
ST/SP/PA generator
Transmit buffer register
Data bus
Transmit shift register
Address
0018
16
Transmit shift completion flag (TSC)
Transmit buffer empty flag (TBE)
Address
0019
16
Serial I/O1 status register
Transmit interrupt request (TI)
ST
detector
SP detector
UART control register
Address 001B
16
Character length selection bit
Address 001A
16
BRG count source selection bit
Transmit interrupt source selection bit
Serial I/O1 synchronous clock selection bit
Clock control circuit
Character length selection bit
7 bits
8 bits
Serial I/O1 control register
P1
2
/S
CLK1
P1
0
/R
X
D
1
P1
1
/T
X
D
1
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