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參數(shù)資料
| 型號： | M37516RSS |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 22/54頁 |
| 文件大?。?/td> | 358K |
| 代理商： | M37516RSS |
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22/54
M37516M6-XXXHP
GNOK-M37516M6-XXXHP-50
(MSETSU 2)
PA
GE
Fig. 20 Block diagram of Serial I/O2
Fig. 21 Timing chart of Serial I/O2
X
IN
"1"
"0"
"0"
"1"
"0"
"1"
S
RDY2
S
C
"0"
"1"
1/8
1/16
1/32
1/64
1/128
1/256
"1"
"0"
X
CIN
"10"
"00"
"01"
Data bus
Serial I/O2
interrupt request
Serial I/O2 port selection bit
Serial I/O counter 2 (3)
Serial I/O2 register (8)
Synchronous circuit
Serial I/O2 port selection bit
Serial I/O2 synchronous
clock selection bit
S
RDY2
output enable bit
External clock
Internal synchronous
clock selection bit
D
Optional transfer bits (3)
P0
2
/S
CLK2
P0
1
/S
OUT2
P0
0
/S
IN2
P0
2
latch
P0
1
latch
P0
3
latch
P0
3
/S
RDY2
P4
3
/S
CMP2
/INT
2
Serial I/O2 I/O comparison
signal control bit
P4
3
latch
Q
D
Main clock division ratio
selection bits (Note)
Note: Either high-speed, middle-speed or low-speed mode is selected by bits 6 and 7 of CPU mode register.
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
Transfer clock (Note 1)
Serial I/O2 output S
OUT2
Serial I/O2 input S
IN2
Receive enable signal S
RDY2
Write-in signal to
serial I/O2 register
(Note 2)
Serial I/O2 interrupt request bit set
.
1: When the internal clock is selected as a transfer clock, the f(X
IN
) clock division (f(X
CIN
) in low-speed mode) can be selected
by setting bits 0 to 2 of serial I/O2 control register 1.
2: When the internal clock is selected as a transfer clock, the S
COUT2
pin has high impedance after transfer completion.
Notes
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