參數(shù)資料
型號(hào): M34506M4-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, MICROCONTROLLER, PDSO20
封裝: 5.30 X 12.60 MM, 1.27 MM PITCH, PLASTIC, SOP-20
文件頁(yè)數(shù): 32/114頁(yè)
文件大小: 836K
代理商: M34506M4-XXXFP
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)當(dāng)前第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)
1
1-7
OVERVIEW
32180 Group User’s Manual (Rev.1.0)
Table 1.2.1 Features of the 32180 (2/2)
1.2 Block Diagram
Functional Block
Features
A-D converter (ADC)
16 channels: 10-bit resolution A-D converter × 2 blocks
Conversion modes: Ordinary conversion modes plus comparator mode
Operation modes: Single conversion mode and n-channel scan mode (n = 1–16)
Sample-and-hold function: Sample-and-hold function can be enabled or disabled as necessary.
A-D disconnection detection assist function: Influences of the analog input voltage wrapping
around from any preceding channel during scan mode operation are suppressed.
An inflow current bypass circuit is built-in.
Can generate an interrupt or start DMA transfer upon completion of A-D conversion.
Either 8 or 10-bit conversion results can be read out.
Interrupt request: Completion of A-D conversion
DMA transfer request: Completion of A-D conversion
Serial I/O (SIO)
6-channel serial I/O
Can be chosen to be clock-synchronized serial I/O or UART.
Data can be transferred at high speed (2 Mbits per second during clock-synchronized mode or
156 Kbits per second during UART mode when f(BCLK) = 20 MHz).
Interrupt request: Reception completed, receive error, transmit buffer empty or transmission completed
DMA transfer request: Reception completed or transmit buffer empty
CAN
16 message slots × 2 blocks
Compliant with CAN specification 2.0B active.
Interrupt request: Transmission completed, reception completed, bus error, error-passive, bus-off
or single shot
DMA transfer request: Failed to send, transmission completed or reception completed
Real-Time Debugger
Internal RAM can be rewritten or monitored independently of the CPU by entering a command
(RTD)
from the outside.
Comes with exclusive clock-synchronized serial ports.
Interrupt request: RTD interrupt command input
Interrupt Controller (ICU)
Controls interrupt requests from the internal peripheral I/O.
Supports 8-level interrupt priority including an interrupt disabled state.
External interrupt: 35 sources (SBI# and TIN0–TIN33)
TIN pin input sensing: Rising, falling or both edges or high or low level
Wait Controller
Controls wait states for access to the extended external area.
Insertion of 0–7 wait states by setting up in software + wait state extension by entering WAIT# signal
PLL
A multiply-by-8 clock generating circuit
Clock
Maximum external input clock frequency (XIN) is 10.0 MHz. (Note 1)
CPUCLK: Operating clock for the M32R-FPU core, internal flash memory and internal RAM
The maximum CPU clock is 80 MHz (when f(XIN) = 10 MHz).
BCLK: Operating clock for the internal peripheral I/O and external data bus
The maximum peripheral clock is 20 MHz (peripheral module access when
f(XIN) = 10 MHz).
Clock output (BCLK pin output): A clock with the same frequency as BCLK is output from this pin.
JTAG
Boundary scan function
VDC
Internal power supply generating circuit: Generates the internal power supply (2.5 V) from an
external single power supply (5 or 3.3 V).
Ports
Input/output pins: 158 pins
The port input threshold can be set in a program to one of three levels individually for each port
group (with or without Schmitt circuit, selectable).
Note 1: The maximum external input clock frequency (XIN) for the M32180F8VFP is 8.0 MHz.
相關(guān)PDF資料
PDF描述
M34506M2-XXXFP 4-BIT, MROM, MICROCONTROLLER, PDSO20
M34507E4FP 4-BIT, OTPROM, MICROCONTROLLER, PDSO24
M34507M2-XXXFP 4-BIT, MROM, MICROCONTROLLER, PDSO24
M34507M4-XXXFP 4-BIT, MROM, MICROCONTROLLER, PDSO24
M34507M2-XXXFP 4-BIT, MROM, MICROCONTROLLER, PDSO24
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M34507E4FP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34507M2-XXXFP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES
M34507M4-XXXFP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34508G4FP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34508G4GP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER