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M16C/28 Group
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
15. A-D Converter
Rev.0.60 2004.02.01
page 206 of N
REJ09B0047-0060Z
Figure 15.2 ADCON0 to ADCON2 Registers
A-D control register 0 (Note)
Symbol
Address
After reset
ADCON0
03D616
00000XXX2
b7
b6
b5
b4
b3
b2
b1
b0
Analog Input Pin Select
Bit
CH0
Bit symbol
Bit name
Function
CH1
CH2
A-D Operation Mode
Select Bit 0
0 0 : One-shot mode or Delayed trigger mode 0,1
0 1 : Repeat mode
1 0 : Single sweep mode or
Simultaneous sample sweep mode
1 1 : Repeat sweep mode 0 or Repeat sweep
mode 1
MD0
MD1
Trigger Select Bit
0 : Software trigger
1 : Hardware trigger
TRG
ADST
A-D Conversion Start Flag
0 : A-D conversion disabled
1 : A-D conversion started
Frequency Select Bit 0
See Table 15.2 A-D Conversion
Frequency Select
CKS0
RW
A-D control register 1 (Note 1)
Symbol
Address
After reset
ADCON1
03D716
0016
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
A-D Sweep Pin Select Bit
SCAN0
SCAN1
MD2
BITS
8/10-Bit Mode Select Bit
0 : 8-bit mode
1 : 10-bit mode
VCUT
VREF Connect Bit
(Note 2)
A-D Operation Mode
Select Bit 1
0 : Other than repeat sweep mode 1
1 : Repeat sweep mode 1
0 : VREF not connected
1 : VREF connected
b4 b3
Note: If the ADCON0 register is rewritten during A-D conversion, the conversion result will be indeterminate.
Frequency Select Bit 1
CKS1
RW
Function varies with each operation mode
See Table 15.2 A-D Conversion
Frequency Select
Note 1: If the ADCON1 register is rewritten during A-D conversion, the conversion result will be indeterminate.
Note 2: If the VCUT bit is reset from “0” (VREF unconnected) to “1” (VREF connected), wait for 1 s or more before
startingA-D conversion.
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
(b7-b6)
Note 1: If the ADCON2 register is rewritten during A-D conversion, the conversion result will be indeterminate.
A-D control register 2 (Note 1)
Symbol
Address
After reset
ADCON2
03D416
0016
b7
b6
b5
b4
b3
b2
b1
b0
A-D Conversion Method
Select Bit
0 : Without sample and hold
1 : With sample and hold
Bit symbol
Bit name
Function
RW
SMP
Reserved Bit
Set to
“0”
0
A-D Input Group Select Bit 0 0 : Select port P10 group (ANi)
0 1 : Do not set
1 0 : Select port P0 group (AN0i)
1 1 : Select port P1/P9 group (AN2i)
b2 b1
Frequency Select Bit 2
CKS2
ADGSEL0
ADGSEL1
RW
(b3)
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
(b7-b6)
RW
TRG1
Trigger Select Bit
See Table 15.2 A-D Conversion
Frequency Select
Function varies with each operation
mode