參數(shù)資料
型號(hào): M2S28D40ATP-75
廠商: Mitsubishi Electric Corporation
英文描述: 128M Double Data Rate Synchronous DRAM
中文描述: 128M的雙數(shù)據(jù)速率同步DRAM
文件頁(yè)數(shù): 34/36頁(yè)
文件大?。?/td> 1216K
代理商: M2S28D40ATP-75
34
MITSUBISHI ELECTRIC
Jun,'00
Preliminary
MITSUBISHI LSIs
DDR SDRAM (Rev.0.1)
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
[Asynchronous SELF REFRESH]
Asynchronous Self -refresh mode is entered by CKE=L within 2 tCLK after issuing a REFA
command (/CS=/RAS=/CAS=L,/WE=H). Once the self-refresh is initiated, it is maintained as long as
CKE is kept low. During the self-refresh mode, CKE is asynchronous and the only enable input, all
other inputs including CLK are disabled and ignored, so that power consumption due to synchronous
inputs is saved. To exit the self-refresh, supplying stable CLK inputs, asserting DESEL or NOP
command and then asserting CKE for longer than tXSNR/tXSRD.
Asynchronous Self-Refresh
/RAS
CKE
/CS
/CAS
/WE
A0-11
BA0,1
tXSNR
Self Refresh Exit
max 2 tCLK
/CLK
CLK
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