參數資料
型號: M2S28D40ATP-10
廠商: Mitsubishi Electric Corporation
英文描述: 128M Double Data Rate Synchronous DRAM
中文描述: 128M的雙數據速率同步DRAM
文件頁數: 33/36頁
文件大?。?/td> 1216K
代理商: M2S28D40ATP-10
33
MITSUBISHI ELECTRIC
Jun,'00
Preliminary
MITSUBISHI LSIs
DDR SDRAM (Rev.0.1)
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
[SELF REFRESH]
Self -refresh mode is entered by issuing a REFS command (/CS=/RAS=/CAS=L,/WE=H,CKE=L).
Once the self-refresh is initiated, it is maintained as long as CKE is kept low. During the self-
refresh mode, CKE is asynchronous and the only enable input, all other inputs including CLK are
disabled and ignored, so that power consumption due to synchronous inputs is saved. To exit the
self-refresh, supplying stable CLK inputs, asserting DESEL or NOP command and then asserting
CKE for longer than tXSNR/tXSRD.
Self-Refresh
/RAS
CKE
/CS
/CAS
/WE
A0-11
BA0,1
tXSNR
Self Refresh Exit
/CLK
CLK
X
Y
X
Y
tXSRD
相關PDF資料
PDF描述
M2S28D40ATP-75 128M Double Data Rate Synchronous DRAM
M2V28S20TP-6 128 x 64 pixel format, LED Backlight available
M2V28S30TP-6 128 x 64 pixel format, LED Backlight available
M2V28S40TP-6 128 x 64 pixel format, LED Backlight available
M2V28S40ATP-7 128M Synchronous DRAM
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