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參數(shù)資料
| 型號： | M27C405-100B1TR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 4 Mbit 512Kb x 8 OTP EPROM |
| 中文描述： | 4兆位× 8檢察官辦公室512KB的存儲器 |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 99K |
| 代理商： | M27C405-100B1TR |
AI00760B
n = 0
Last
Addr
VERIFY
E = 100
μ
s Pulse
++n
= 25
++ Addr
VCC= 6.25V, VPP= 12.75V
FAIL
CHECK ALL BYTES
1st: VCC= 6V
2nd: VCC= 4.2V
YES
NO
YES
NO
YES
NO
Figure 7. ProgrammingFlowchart
PRESTOII Programming Algorithm
PRESTO II Programming Algorithm allows the
whole array to beprogrammed witha guaranteed
margin, ina typicaltime of52.5 seconds.Program-
ming with PRESTO II consists of applying a se-
quenceof 100
μ
s programpulsesto each byteuntil
a correct verify occurs(see Figure 7). Duringpro-
grammingand verifyoperation,a MARGINMODE
circuitis automaticallyactivatedin orderto guaran-
tee that each cell is programmed with enough
margin. Nooverprogrampulseisappliedsincethe
verify in MARGIN MODE provides the necessary
margin to each programmedcell.
ProgramInhibit
Programmingof multipleM27C405sinparallelwith
differentdata is also easily accomplished. Except
for E, all like inputs including G of the parallel
M27C405 may be common. ATTL low level pulse
appliedto aM27C405’sEinput,with V
PP
at12.75V,
will program that M27C405. A high level E input
inhibits the other M27C405s from being pro-
grammed.
ProgramVerify
A verify (read) should be performed on the pro-
grammedbitsto determinethattheywere correctly
programmed. Theverifyis accomplishedwithG at
V
IL
, E at V
IH
, V
PP
at 12.75Vand V
CC
at 6.25V.
On-Board Programming
Programming the M27C405 may be performed
directly in the application circuit, however this re-
quires modification to the PRESTO II Algorithm
(see Figure 8). For in-circuit programming V
CC
is
determinedby theuserand normallyis compatible
withother componentsusing thesamesupplyvolt-
age.It is recommendedthatthemaximum valueof
V
CC
which remains compatible with the circuit is
used.
Typically V
CC
=5.5V for programming systems us-
ing V
CC
=5V is recommended. The value of V
CC
does not affect the programming, it givesa higher
test capability in VERIFY mode.
V
PP
must be kept at 12.75 volts to maintain and
enable the programming.
AI01349
n = 0
Last
Addr
VERIFY
E = 10
μ
s Pulse
++n
= 25
++ Addr
VPP=
12.75V
FAIL
CHECK ALL BYTES
VPP= VCC
YES
NO
YES
NO
YES
NO
SET MARGIN MODE
E = 10
μ
s Pulse
Figure 8. On-Board Programming Flowchart
9/15
M27C405
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