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參數(shù)資料
| 型號(hào)： | M27C405-100B1TR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 4 Mbit 512Kb x 8 OTP EPROM |
| 中文描述： | 4兆位× 8檢察官辦公室512KB的存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 5/15頁(yè) |
| 文件大?。?/td> | 99K |
| 代理商： | M27C405-100B1TR |
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Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
≤
V
IN
≤
V
CC
±
10
μ
A
I
LO
Output Leakage Current
0V
≤
V
OUT
≤
V
CC
±
10
μ
A
I
CC
Supply Current
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 5MHz
30
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC2
Supply Current (Standby) CMOS
E > V
CC
–0.2V
100
μ
A
I
PP
Program Current
V
PP
= V
CC
10
μ
A
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH
(2)
Input High Voltage
2
V
CC
+ 1
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High VoltageTTL
I
OH
= –400
μ
A
2.4
V
Output High Voltage CMOS
I
OH
= –100
μ
A
V
CC
– 0.7V
V
Notes:
1. V
must be applied simultaneouslywith or before V
PP
and removed simultaneously or after V
PP.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Table7. Read Mode DC Characteristics
(1)
(T
A
= 0 to 70
°
C or –40 to 85
°
C; V
CC
= 5V
±
10%;V
PP
= V
CC
)
Symbol
Alt
Parameter
Test Condition
M27C405
Unit
-70
(3)
-80
-90
Min
Max
Min
Max
Min
Max
t
AVQV
t
ACC
Address Validto
Output Valid
E = V
IL
, G = V
IL
70
80
90
ns
t
ELQV
t
CE
Chip Enable Low to
Output Valid
G = V
IL
70
80
90
ns
t
GLQV
t
OE
Output Enable Low
to Output Valid
E = V
IL
35
40
40
ns
t
EHQZ
(2)
t
DF
Chip Enable High to
Output Hi-Z
G = V
IL
0
30
0
30
0
30
ns
t
GHQZ(2)
t
DF
Output Enable High
to Output Hi-Z
E = V
IL
0
30
0
30
0
30
ns
t
AXQX
t
OH
Address Transition to
Output Transition
E = V
IL
, G = V
IL
0
0
0
ns
Notes:
1. V
must be applied simultaneouslywith or before V
PP
and removed simultaneously or after V
PP.
2. Sampled only,not 100% tested.
3. In case of 70ns speed see High Speed AC Measurement conditions.
Table8A. Read ModeAC Characteristics
(1)
(T
A
= 0 to 70
°
C or –40 to 85
°
C; V
CC
= 5V
±
10%;V
PP
= V
CC
)
5/15
M27C405
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