參數(shù)資料
型號： M25PE40VMW6G
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 512K X 8 SPI BUS SERIAL EEPROM, PDSO8
封裝： 0.208 INCH, ROHS COMPLIANT, PLASTIC, SOP-8
文件頁數(shù)： 19/62頁
文件大?。?/td> 565K
代理商： M25PE40VMW6G
Instructions
M25PE40
6.5
Write Status Register (WRSR)
The Write Status Register (WRSR) instruction allows new values to be written to the Status
Register.
Note:
The Status Register BPi and SRWD bits are available in the M25PE40 in the T9HX process
only. See Important note on page 6 for more details.
Before the Write Status Register (WRSR) instruction can be accepted, a Write Enable
(WREN) instruction must previously have been executed. After the Write Enable (WREN)
instruction has been decoded and executed, the device sets the Write Enable Latch (WEL).
The Write Status Register (WRSR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code and the data byte on Serial Data input (D).
The instruction sequence is shown in Figure 11.
The Write Status Register (WRSR) instruction has no effect on b6, b5, b1 and b0 of the
Status Register. b6 and b5 are always read as 0.
Chip Select (S) must be driven High after the eighth bit of the data byte has been latched in.
If not, the Write Status Register (WRSR) instruction is not executed. As soon as Chip Select
(S) is driven High, the self-timed Write Status Register cycle (whose duration is tW) is
initiated. While the Write Status Register cycle is in progress, the Status Register may still
be read to check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP)
bit is 1 during the self-timed Write Status Register cycle, and is 0 when it is completed.
When the cycle is completed, the Write Enable Latch (WEL) is reset.
The Write Status Register (WRSR) instruction allows the user to change the values of the
Block Protect (BP2, BP1, BP0) bits, to define the size of the area that is to be treated as
read-only, as defined in Table 3. The Write Status Register (WRSR) instruction also allows
the user to set or reset the Status Register Write Disable (SRWD) bit in accordance with the
Write Protect (W) signal (see Section 6.4.4).
If a Write Status Register (WRSR) instruction is interrupted by a Reset Low pulse, the
internal cycle of the Write Status Register operation (whose duration is tW) is first completed
(provided that the supply voltage VCC remains within the operating range). After that the
device enters the Reset mode (see also Table 12: Device status after a Reset Low pulse
Figure 11.
Write Status Register (WRSR) instruction sequence
C
D
AI02282D
S
Q
2
1
3456789 10 11 12 13 14 15
High Impedance
Instruction
Status
Register in
0
765432
0
1
MSB
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M25PE40-VMW6G 功能描述:閃存 4 Mbit Lo Vltg Page Erasable Seral 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
M25PE40-VMW6G_NUD 制造商:Micron Technology Inc 功能描述:
M25PE40VMW6P 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout
M25PE40-VMW6P 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout
M25PE40VMW6TG 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout
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