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參數(shù)資料
| 型號： | M12L16161A-5.5T |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 512K x 16Bit x 2Banks Synchronous DRAM |
| 中文描述： | 為512k × 16Bit的X 2Banks同步DRAM |
| 文件頁數(shù)： | 23/27頁 |
| 文件大?。?/td> | 566K |
| 代理商： | M12L16161A-5.5T |
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M12L16161A
Elite Semiconductor Memory Technology Inc.
P.
23
Publication Date : J an. 2000
Revision : 1.3u
Burst Read Single bit Write Cycle @Burst Length=2
*Note:1.BRSW modes is enabled by setting A9 “High” at MRS(Mode Register Set).
At the BRSW Mode, the burst length at write is fixed to “1” regardless of programmed burst length.
2.When BRSW write command with auto precharge is executed, keep it in mind that
t
RAS
should not be violated.
Auto precharge is executed at the next cycle of burst-end, so in the case of BRSW write command, the precharge
command will be issued after two clock cycles.
C L O C K
C K E
A D D R
C L = 2
D Q M
A 1 0 / A P
B A
R A a
R A c
R A a
QA b0
R ow A c t i v e
(A - B a n k )
W r i te
(A - B a n k )
: D on 't C a r e
H IG H
Q A b 1
P r ec h a r g e
(A - B a n k )
C A a
R B b
C A b
C B c
C A d
R A c
D B c 0
D Q
D A a 0
Q A b 0
D B c 0
Q A b 1
C L = 3
Row Active
(B-Bank)
R ow A c t i v e
(A - B a n k )
W r i te w i t h
A u t o P r ec h a r g e
(B - B a n k )
R ea d
(A - B a n k )
1
9
2
1 0
3
4
5
6
7
8
1 1
1 2
1 3
1 4
1 7
1 5
1 8
1 6
1 9
0
D A a 0
Q A d 0 QA d1
QA d0 Q A d1
*N ot e 1
C S
R A S
C A S
W E
R B b
*N o t e 2
Read with
Auto Precharge
(A-Bank)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M12L16161A-5T | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A-5TG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A-5TG2Q | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks |
| M12L16161A-5TIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:512K x 16Bit x 2Banks Synchronous DRAM |
| M12L16161A-6T | 制造商:ESI 功能描述: |
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