- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45001 > LUCW3000CCN-TR PLL FREQUENCY SYNTHESIZER, 2200 MHz, PDSO14 PDF資料下載
參數(shù)資料
| 型號： | LUCW3000CCN-TR |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 2200 MHz, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數(shù)： | 22/28頁 |
| 文件大小： | 326K |
| 代理商： | LUCW3000CCN-TR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁
Advance Data Sheet
December 1999
W3000 PLL Dual-Band Frequency Synthesizer
Lucent Technologies Inc.
3
Description
The W3000 is a high-performance UHF RF PLL synthesizer, designed for use in digital wireless communication
applications. Particular emphasis in the design has been placed on dual-band applications, with near-seamless
switching between operational bands without the need for external loop-filter circuitry other than that required for
single band applications. In combination with a suitable reference crystal, UHF VCO, and associated loop-filter
components, the W3000 offers a very low-noise oscillator solution.
The reference signal is divided by a programmable 11-bit counter to provide a wide range of comparison
frequencies, allowing compliance with the various standards. The reference input is rising-edge triggered, and we
recommend that an inverting buffer be used when the W3000 is interfaced to a commercial TCXO.
The MAIN_IN signal normally associated with the UHF VCO is fed into a dual modulus prescaler (64/65) and is
then divided by the 11-bit main counter to be compared to the output of the reference counter in a digital phase
detector.
The W3000 is implemented with programmable charge-pump currents to allow fast switching between bands for
dual-band applications, without changing the loop filter. The charge pump can be programmed internally, or
externally with a resistor (recommended). Charge pump outputs can be disabled, thereby allowing open-loop
VCO modulation schemes.
With synchronous reloading, the counter reloads a new programmed value when the counter reaches zero. With
forced counter reloading, the reloading occurs when the programmed word is latched in. These techniques can
improve lock time when performing a dual-band hop or in start-up conditions.
The W3000 uses a standard 3-wire programming bus (data, enable, clock) that operates up to 10 MHz. This
serial interface is via a 24-bit word that incorporates both register addressing and device addressing allowing two
chips to share the bus.
TR REGISTER
CONFIG REGISTER
MAIN REGISTER
REF REGISTER
MAIN REGISTER
SC1
PARALLEL LATCH
SERLE1
SERCK
SERDA
SERIAL SHIFT
ADDRESS
DECODER
ADDRESS
DECODER
PARALLEL LATCH
A[0:2]
CLK
DAT
SERIAL SHIFT
A[0:2]
LAT
DAT
CLK
LAT
W3020
W3000
Figure 2. Serial Bus Programming
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LUW025F-S | 1-OUTPUT 16.5 W DC-DC REG PWR SUPPLY MODULE |
| LUW025F6 | 1-OUTPUT 16.5 W DC-DC REG PWR SUPPLY MODULE |
| LUW025F | 1-OUTPUT 16.5 W DC-DC REG PWR SUPPLY MODULE |
| LUW025A-S | 1-OUTPUT 25 W DC-DC REG PWR SUPPLY MODULE |
| LUW025F8 | 1-OUTPUT 16.5 W DC-DC REG PWR SUPPLY MODULE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LUCW3011FCL | 制造商:AGERE 制造商全稱:AGERE 功能描述:1 GHz Quadrature Modulator |
| LUCW3020CCS | 制造商:AGERE 制造商全稱:AGERE 功能描述:GSM Multiband RF Transceiver |
| LUCW3020CCS-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:GSM Multiband RF Transceiver |
| LUCW3030ACA | 制造商:AGERE 制造商全稱:AGERE 功能描述:W3030 3 V Dual-Mode IF Cellular Receiver |
| LUCW3030ACA-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:W3030 3 V Dual-Mode IF Cellular Receiver |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。