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參數(shù)資料
| 型號： | LTM9005IV-AB#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PBGA204 |
| 封裝： | 22 X 15 MM, 4.32 MM HEIGHT, LEAD FREE, MO-222, LGA-204 |
| 文件頁數(shù)： | 21/24頁 |
| 文件大?。?/td> | 468K |
| 代理商： | LTM9005IV-AB#PBF |
LTM9005
6
9005p
TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 3)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3: VCC1 = 3.3V, VCC2 = VCC3 = VDD = 3V, AMP1SHDN = AMP2SHDN =
ADCSHDN = 0V, EN = 3.3V, fSAMPLE = 125MHz, RF input power = –10dBm.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fs
Sampling Frequency
l
1
125
MHz
tL
CLK Low Time
Duty Cycle Stabilizer Off (Note 6)
Duty Cycle Stabilizer On (Note 6)
l
3.8
3
4
500
ns
tH
CLK High Time
Duty Cycle Stabilizer Off (Note 6)
Duty Cycle Stabilizer On (Note 6)
l
3.8
3
4
500
ns
tAP
Sample-and-Hold Aperture Delay
Figure 1 (Note 6, Note 7)
0
ns
tJITTER
Sample-and-Hold Acquisition Delay Time Jitter
(Note 6, Note 7)
0.2
psRMS
tD
CLK to DATA delay
CL = 5pF (Note 6)
l
1.4
2.7
5.4
ns
DATA Access Time After OE
↓
CL = 5pF (Note 6)
l
4.3
10
ns
BUS Relinquish Time
(Note 6)
l
3.3
8.5
ns
Pipeline Latency
5
Cycles
Note 4: Integral nonlinearity is defined as the deviation of a code from
a “best fit straight line” to the transfer curve. The deviation is measured
from the center of the quantization band.
Note 5: Noise level superimposed on the GAIN pin at 140MHz required to
generate spur above the noise floor.
Note 6: Guaranteed by design, not subject to test.
Note 7: Analog input measured at L8-L9 pads.
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC1
Mixer Supply Range
l
2.9
3.3
3.6
V
VCC2
First Amplifier Supply Range
l
2.85
3.3
3.465
V
VCC3
Second Amplifier Supply Range
l
2.85
3.3
3.465
V
VDD
ADC Analog Supply Voltage
l
2.85
3.3
3.465
V
OVDD
ADC Digital Output Supply Voltage
l
0.5
3.3
3.6
V
ICC1
Mixer Supply Current
EN = 3V
l
82
92
mA
ICC1(SHDN) Mixer Shutdown Supply Current
EN = 0V
l
100
A
ICC2
First Amplifier Supply Current
AMP1SHDN = 0V
l
90
105
mA
ICC2(SHDN) First Amplifier Shutdown Supply Current
AMP1SHDN = 3V
l
3
mA
ICC3
Second Amplifier Supply Current
AMP2SHDN = 0V
l
90
105
mA
ICC3(SHDN) Second Amplifier Shutdown Supply Current AMP2SHDN = 3V
l
3
mA
IDD
ADC Supply Current
ADCSHDN = 0V
l
132
156
mA
PD(SHDN) Power Dissipation in Shutdown
EN = 0V, AMP1SHDN = AMP2SHDN =
ADCSHDN = 3V, OE = 3V, No RF, No LO, No CLK
TBD
mW
PD(NAP)
ADC Nap Mode Power
EN = 0V, AMP1SHDN = AMP2SHDN =
ADCSHDN = 3V, OE = 0V, No RF, No LO, No CLK
15
mW
PD(TOTAL) Total Power Dissipation
EN = 3V, AMP1SHDN = AMP2SHDN =
ADCSHDN = 0V, OE = 0V, fSAMPLE = MAX
1200
mW
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