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參數資料
| 型號： | LTC4090EDJC#TRPBR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO22 |
| 封裝： | 6 X 3 MM, 0.75 MM HEIGHT, LEAD FREE, PLASTIC, MO-229WXXX, DFN-22 |
| 文件頁數： | 18/28頁 |
| 文件大小： | 392K |
| 代理商： | LTC4090EDJC#TRPBR |
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LTC4090
25
4090f
Figure 10. Suggested Board Layout
Board Layout Considerations
As discussed in the previous section, it is critical that the
exposed metal pad on the backside of the LTC4090 package
be soldered to the PC board ground. Furthermore, proper
operation and minimum EMI requires a careful printed
circuit board (PCB) layout. Note that large, switched cur-
rents ow in the power switch (between the HVIN and SW
pins), the catch diode and the HVIN input capacitor. These
components, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane below these components.
The loop formed by these components should be as small
as possible.
Additionally, the SW and BOOST nodes should be kept
as small as possible. Figure 10 shows the recommended
component placement with trace and via locations.
High frequency currents, such as the high voltage input
current of the LTC4090, tend to nd their way along
the ground plane on a mirror path directly beneath the
incident path on the top of the board. If there are slits or
cuts in the ground plane due to other traces on that layer,
the current will be forced to go around the slits. If high
frequency currents are not allowed to ow back through
their natural least-area path, excessive voltage will build
up and radiated emissions will occur. See Figure 11.
IN and HVIN Bypass Capacitor
Many types of capacitors can be used for input bypassing;
however, caution must be exercised when using multilayer
ceramic capacitors. Because of the self-resonant and high
Q characteristics of some types of ceramic capacitors,
high voltage transients can be generated under some
start-up conditions, such as from connecting the charger
input to a hot power source. For more information, refer
to Application Note 88.
Battery Charger Stability Considerations
The constant-voltage mode feedback loop is stable without
any compensation when a battery is connected with low
impedance leads. Excessive lead length, however, may add
enough series inductance to require a bypass capacitor
of at least 1μF from BAT to GND. Furthermore, a 4.7μF
capacitor with a 0.2Ω to 1Ω series resistor to GND is
recommended at the BAT pin to keep ripple voltage low
when the battery is disconnected.
APPLICATIONS INFORMATION
C1 AND D1
GND PADS
SIDE-BY-SIDE
AND SEPERATED
WITH C3 GND PAD
U1 THERMAL PAD
SOLDERED TO PCB.
VIAS CONNECTED TO ALL
GND PLANES WITHOUT
THERMAL RELIEF
MINIMIZE D1, L1,
C3, U1, SW PIN LOOP
MINIMIZE TRACE LENGTH
4090 F10
Figure 11. Ground Currents Follow Their Incident Path at High
Speed. Slices in the Ground Plane Cause High Voltage and Increased
Emissions.
4090 F11
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