參數(shù)資料
型號: LTC3880EUJ-1#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.1 A DUAL SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PQCC40
封裝: 6 X 6 MM, LEAD FREE, PLASTIC, WJJD-2, QFN-40
文件頁數(shù): 56/112頁
文件大?。?/td> 2182K
代理商: LTC3880EUJ-1#PBF
LTC3880/LTC3880-1
48
3880fa
APPLICATIONS INFORMATION
The PLL has a lock detection circuit. If the PLL should
lose lock during operation, bit 4 of the STATUS_MFR_
SPECIFIC command is asserted and the ALERT pin is
pulled low. The fault can be cleared by writing a 1 to the
bit. If the user does not wish to see the PLL_FAULT, even
if a synchronization clock is not available at power up,
bit 3 of the MFR_CONFIG_ALL_LTC3880 command must
be asserted.
If the SYNC signal is not clocking in the application, the
PLL will run at the lowest free running frequency of the
VCO. This will be well below the intended PWM frequency
of the application and may cause undesirable operation
of the converter.
If the PWM signal appears to be running at too high a
frequency, monitor the SYNC pin. Extra transitions on
the falling edge will result in the PLL trying to lock on to
noise versus the intended signal. Review routing of digital
control signals and minimize crosstalk to the SYNC signal
to avoid this problem. Multiple LTC3880s are required to
configurations it is optional. If the SYNC pin is shared be-
tween LTC3880s, only one LTC3880 can be programmed
with a frequency output. All the other LTC3880s must be
programmed to external clock.
MINIMUM ON-TIME CONSIDERATIONS
Minimum on-time, tON(MIN), is the smallest time duration
that the LTC3880 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
tON(MIN) <
VOUT
VIN fOSC
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC3880 is approximately
90ns, with reasonably good PCB layout, minimum 30%
inductor current ripple and at least 10mV – 15mV ripple
on the current sense signal. The minimum on-time can be
affected by PCB switching noise in the voltage and cur-
rent loop. As the peak current sense voltage decreases,
the minimum on-time gradually increases to 130ns. This
is of particular concern in forced continuous applications
with low ripple current at light loads. If the duty cycle
drops below the minimum on-time limit in this situation,
a significant amount of cycle skipping can occur with cor-
respondingly larger current and voltage ripple.
RCONFIG (EXTERNAL RESISTOR
CONFIGURATION PINS)
The LTC3880 default NVM is programmed to respect the
RCONFIG pins. If a user wishes the output voltage, PWM
frequency and phasing and the address to be set without
programmingthepartorpurchasingspeciallyprogrammed
parts, the RCONFIG pins can be used to establish these
parameters. The RCONFIG pins all require a resistor di-
vider between the VDD25 and SGND of the LTC3880. The
RCONFIG pins are only monitored at initial power up and
during a reset so modifying their values perhaps using an
A/D after the part is powered will have no effect. 1% resis-
tors or better must be used to assure proper operation.
Noisy clock signals should not be routed near these pins.
Voltage Selection
When an output voltage is set using the RCONFIG pins on
VOUTn_CFG and VTRIMn_CFG, the following parameters
are set as a percentage of the output voltage:
VOUT_OV_FAULT_LIMIT
+10%
VOUT_OV_WARN
+7.5%
VOUT_MAX
+7.5%
VOUT_MARGIN_HI
+5%
POWER_GOOD_ON
–7%
POWER_GOOD_OFF
–8%
VOUT_MARGIN_LO
–5%
VOUT_UV_WARN
–6.5%
VOUT_UV_FAULT_LIMIT
–7%
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